RE: Enable DDR ECC in Am62A processor » 0002-mitysom-62ax-hack-Reduce-4GB-size-for-ECC.patch
| board/cl/mitysom-62ax/ddr-setup.c | ||
|---|---|---|
| 183 | 183 |
#if IS_ENABLED(CONFIG_PHYS_64BIT) |
| 184 | 184 |
gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; |
| 185 | 185 |
gd->bd->bi_dram[1].size = 0x80000000; // 2GB |
| 186 | ||
| 187 |
printf("Limiting LPDDR4 for ECC\n");
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|
| 188 |
gd->bd->bi_dram[1].size -= 0x20000000; // -512MB for ECC |
|
| 189 |
// TI calculates all this in k3_ddrss_lpddr4_ecc_calc_reserved_mem |
|
| 190 |
// and normally applies it in k3_ddrss_ddr_fdt_fixup but we're not using it yet |
|
| 186 | 191 |
#endif |
| 187 | 192 |
break; |
| 188 | 193 |
// MT53E2G32D4DE-046 AIT:C |
