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Ethernet RMII2 working in u-boot, but not kernel » skyline-0001-sent-to-criticallink-for-review.patch

dan mcgee, 10/24/2013 12:43 PM

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arch/arm/mach-omap2/baseboard-mityarm335x-devkit.c
/* Vitesse 8601 register defs we need... */
#define VSC8601_PHY_ID (0x00070420)
#define VSC8601_PHY_MASK (0xFFFFFFFC)
#define MII_EXTPAGE (0x1F)
#define RGMII_SKEW (0x1C)
#define MII_EXTPAGE (0x1F)
#define RGMII_SKEW (0x1C)
#define MITY335X_DK_SPIBUS_TS (1)
/* TODO - refactor all the pinmux stuff for all board files to use */
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
#define MITY335X_DK_GPIO_TS_IRQ_N GPIO_TO_PIN(0,20)
#define MITY335X_DK_GPIO_BACKLIGHT GPIO_TO_PIN(3,14)
#define MITY335X_DK_GPIO_TS_IRQ_N GPIO_TO_PIN(0,20)
#define MITY335X_DK_GPIO_BACKLIGHT GPIO_TO_PIN(3,14)
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
#define TS_USE_SPI 0 /*1 -- currently not supported*/
#else
#define TS_USE_SPI 0
#endif
struct pinmux_config {
const char *muxname;
int val;
const char *muxname;
int val;
};
#define setup_pin_mux(pin_mux) \
{ \
int i = 0; \
for (; pin_mux[i].muxname != NULL; i++) \
omap_mux_init_signal(pin_mux[i].muxname, pin_mux[i].val); \
int i = 0; \
for (; pin_mux[i].muxname != NULL; i++) \
omap_mux_init_signal(pin_mux[i].muxname, pin_mux[i].val); \
}
/******************************************************************************
......
*
*****************************************************************************/
static struct pinmux_config rmii2_pin_mux[] = {
{"gpmc_csn3.rmii2_crs_dv", AM33XX_PIN_INPUT_PULLUP},
// {"gpmc_wait0.rmii2_crs_dv", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_a0.rmii2_txen", AM33XX_PIN_OUTPUT}, // --
{"gpmc_a5.rmii2_txd0", AM33XX_PIN_OUTPUT}, // --
{"gpmc_a4.rmii2_txd1", AM33XX_PIN_OUTPUT}, // ---
{"gpmc_a11.rmii2_rxd0", AM33XX_PIN_INPUT_PULLDOWN}, // --
{"gpmc_a10.rmii2_rxd1", AM33XX_PIN_INPUT_PULLDOWN}, // --
{"mii1_col.rmii2_refclk", AM33XX_PIN_INPUT_PULLDOWN}, // --
{"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
{"mdio_clk.mdio_clk", AM33XX_PIN_OUTPUT_PULLUP},
{NULL, 0}
};
static struct pinmux_config rgmii2_pin_mux[] = {
{"gpmc_a0.rgmii2_tctl", AM33XX_PIN_OUTPUT},
{"gpmc_a1.rgmii2_rctl", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a2.rgmii2_td3", AM33XX_PIN_OUTPUT},
{"gpmc_a3.rgmii2_td2", AM33XX_PIN_OUTPUT},
{"gpmc_a4.rgmii2_td1", AM33XX_PIN_OUTPUT},
{"gpmc_a5.rgmii2_td0", AM33XX_PIN_OUTPUT},
{"gpmc_a6.rgmii2_tclk", AM33XX_PIN_OUTPUT},
{"gpmc_a7.rgmii2_rclk", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a8.rgmii2_rd3", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a9.rgmii2_rd2", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a10.rgmii2_rd1", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a11.rgmii2_rd0", AM33XX_PIN_INPUT_PULLDOWN},
{"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
{"mdio_clk.mdio_clk", AM33XX_PIN_OUTPUT_PULLUP},
{NULL, 0}
{"gpmc_a0.rgmii2_tctl", AM33XX_PIN_OUTPUT},
{"gpmc_a1.rgmii2_rctl", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a2.rgmii2_td3", AM33XX_PIN_OUTPUT},
{"gpmc_a3.rgmii2_td2", AM33XX_PIN_OUTPUT},
{"gpmc_a4.rgmii2_td1", AM33XX_PIN_OUTPUT},
{"gpmc_a5.rgmii2_td0", AM33XX_PIN_OUTPUT},
{"gpmc_a6.rgmii2_tclk", AM33XX_PIN_OUTPUT},
{"gpmc_a7.rgmii2_rclk", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a8.rgmii2_rd3", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a9.rgmii2_rd2", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a10.rgmii2_rd1", AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a11.rgmii2_rd0", AM33XX_PIN_INPUT_PULLDOWN},
{"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
{"mdio_clk.mdio_clk", AM33XX_PIN_OUTPUT_PULLUP},
{NULL, 0}
};
static struct pinmux_config lcdc_pin_mux[] = {
{"lcd_data0.lcd_data0", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data1.lcd_data1", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data2.lcd_data2", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data3.lcd_data3", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data4.lcd_data4", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data5.lcd_data5", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data6.lcd_data6", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data7.lcd_data7", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data8.lcd_data8", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data9.lcd_data9", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data10.lcd_data10", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data11.lcd_data11", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data12.lcd_data12", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data13.lcd_data13", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data14.lcd_data14", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data15.lcd_data15", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_vsync.lcd_vsync", AM33XX_PIN_OUTPUT},
{"lcd_hsync.lcd_hsync", AM33XX_PIN_OUTPUT},
{"lcd_pclk.lcd_pclk", AM33XX_PIN_OUTPUT},
{"lcd_ac_bias_en.lcd_ac_bias_en", AM33XX_PIN_OUTPUT},
/* GPIO for the backlight */
{ "mcasp0_aclkx.gpio3_14", AM33XX_PIN_OUTPUT},
{NULL, 0}
#if 0 //danm
{"lcd_data0.lcd_data0", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data1.lcd_data1", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data2.lcd_data2", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data3.lcd_data3", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data4.lcd_data4", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data5.lcd_data5", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data6.lcd_data6", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data7.lcd_data7", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data8.lcd_data8", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data9.lcd_data9", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data10.lcd_data10", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data11.lcd_data11", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data12.lcd_data12", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data13.lcd_data13", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data14.lcd_data14", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_data15.lcd_data15", AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
{"lcd_vsync.lcd_vsync", AM33XX_PIN_OUTPUT},
{"lcd_hsync.lcd_hsync", AM33XX_PIN_OUTPUT},
{"lcd_pclk.lcd_pclk", AM33XX_PIN_OUTPUT},
{"lcd_ac_bias_en.lcd_ac_bias_en", AM33XX_PIN_OUTPUT},
/* GPIO for the backlight */
{ "mcasp0_aclkx.gpio3_14", AM33XX_PIN_OUTPUT},
#endif
{NULL, 0}
};
static struct pinmux_config mmc0_pin_mux[] = {
{"mmc0_dat3.mmc0_dat3", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_dat2.mmc0_dat2", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_dat1.mmc0_dat1", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_dat0.mmc0_dat0", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_clk.mmc0_clk", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_cmd.mmc0_cmd", AM33XX_PIN_INPUT_PULLUP},
{"mii1_txen.gpio3_3", AM33XX_PIN_INPUT_PULLUP}, /* SD Card Detect */
{"mii1_col.gpio3_0", AM33XX_PIN_INPUT_PULLUP}, /* SD Write Protect */
{NULL, 0}
{"mmc0_dat3.mmc0_dat3", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_dat2.mmc0_dat2", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_dat1.mmc0_dat1", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_dat0.mmc0_dat0", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_clk.mmc0_clk", AM33XX_PIN_INPUT_PULLUP},
{"mmc0_cmd.mmc0_cmd", AM33XX_PIN_INPUT_PULLUP},
// danm {"mii1_txen.gpio3_3", AM33XX_PIN_INPUT_PULLUP}, /* SD Card Detect */
// {"mii1_col.gpio3_0", AM33XX_PIN_INPUT_PULLUP}, /* SD Write Protect */
{NULL, 0}
};
/**
* Expansion connector pins for SDIO
* Pin WifiJ1 DevJ700 335X PIN/Function
* 1 SDIO_D3 GPMC_AD15 GPMC_AD15/MMC2_DAT3
* 3 SDIO_D2 GPMC_AD14 GPMC_AD14/MMC2_DAT2
* 5 SDIO_D1 GPMC_AD13 GPMC_AD13/MMC2_DAT1
* 7 SDIO_D0 GPMC_AD12 GPMC_AD12/MMC2_DAT0
* 9 RESET GPMC_AD11 GPMC_AD11/GPIO2_27
* 22 SDIO_CMD GPMC_CS3_N GPMC_CSN3/MMC2_CMD
* 30 SDIO_CLK GPMC_CLK GPMC_CLK/MMC2_CLK
* Pin WifiJ1 DevJ700 335X PIN/Function
* 1 SDIO_D3 GPMC_AD15 GPMC_AD15/MMC2_DAT3
* 3 SDIO_D2 GPMC_AD14 GPMC_AD14/MMC2_DAT2
* 5 SDIO_D1 GPMC_AD13 GPMC_AD13/MMC2_DAT1
* 7 SDIO_D0 GPMC_AD12 GPMC_AD12/MMC2_DAT0
* 9 RESET GPMC_AD11 GPMC_AD11/GPIO2_27
* 22 SDIO_CMD GPMC_CS3_N GPMC_CSN3/MMC2_CMD
* 30 SDIO_CLK GPMC_CLK GPMC_CLK/MMC2_CLK
*/
static struct pinmux_config mmc2_pin_mux[] = {
{"gpmc_ad15.mmc2_dat3", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad14.mmc2_dat2", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad13.mmc2_dat1", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad12.mmc2_dat0", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_clk.mmc2_clk", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_csn3.mmc2_cmd", AM33XX_PIN_INPUT_PULLUP},
{NULL, 0}
{"gpmc_ad15.mmc2_dat3", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad14.mmc2_dat2", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad13.mmc2_dat1", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad12.mmc2_dat0", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_clk.mmc2_clk", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_csn3.mmc2_cmd", AM33XX_PIN_INPUT_PULLUP},
{NULL, 0}
};
static struct pinmux_config can_pin_mux[] = {
{"uart1_rxd.d_can1_tx", AM33XX_PULL_ENBL},
{"uart1_txd.d_can1_rx", AM33XX_PIN_INPUT_PULLUP},
{"mii1_txd3.d_can0_tx", AM33XX_PULL_ENBL},
{"mii1_txd2.d_can0_rx", AM33XX_PIN_INPUT_PULLUP},
{NULL, 0}
{"uart1_rxd.d_can1_tx", AM33XX_PULL_ENBL},
{"uart1_txd.d_can1_rx", AM33XX_PIN_INPUT_PULLUP},
{"mii1_txd3.d_can0_tx", AM33XX_PULL_ENBL},
{"mii1_txd2.d_can0_rx", AM33XX_PIN_INPUT_PULLUP},
{NULL, 0}
};
static struct pinmux_config expansion_pin_mux[] = {
{"uart0_ctsn.uart4_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
{"uart0_rtsn.uart4_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
{"mii1_rxd3.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp1 RX */
{"mii1_rxd2.uart3_txd", AM33XX_PULL_ENBL}, /* Exp1 TX */
{"mii1_rxd1.gpio2_20", AM33XX_PULL_ENBL}, /* Exp1 TX EN */
{"mii1_txclk.gpio3_9", AM33XX_PULL_ENBL}, /* Exp0 TX EN */
{NULL, 0}
{"uart1_rxd.uart1_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
{"uart1_txd.uart1_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
{"mii1_rxd3.uart1_dtrn", AM33XX_PULL_ENBL}, /* uart 1 modem */
{"mii1_rxclk..uart1_dsrn", AM33XX_PULL_ENBL}, /* */
{"mii1_txclk.uart1_dcdn", AM33XX_PULL_ENBL}, /* */
{"spi0_sclk.uart2_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
{"spi0_d0.uart2_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
{"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},/*- Exp0 RX */
{"mii1_rxd2.uart3_txd", AM33XX_PULL_ENBL}, /* - Exp0 TX */
{"mii1_txd3.uart4_rxd", AM33XX_PIN_INPUT_PULLUP},/* - Exp0 RX */
{"mii1_txd2.uart4_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
{"lcd_data9.uart5_rxd", AM33XX_PIN_INPUT_PULLUP},/*- Exp0 RX */
{"lcd_data8.uart5_txd", AM33XX_PULL_ENBL}, /*- Exp0 TX */
{NULL, 0}
};
static struct pinmux_config usb_pin_mux[] = {
{"usb0_drvvbus.usb0_drvvbus", AM33XX_PIN_OUTPUT},
{"usb1_drvvbus.usb1_drvvbus", AM33XX_PIN_OUTPUT},
{NULL, 0}
{"usb0_drvvbus.usb0_drvvbus", AM33XX_PIN_OUTPUT},
{"usb1_drvvbus.usb1_drvvbus", AM33XX_PIN_OUTPUT},
{NULL, 0}
};
#if (TS_USE_SPI)
static struct pinmux_config ts_pin_mux[] = {
/* SPI0 CS0 taken care of by SPI pinmux setup */
{"xdma_event_intr1.gpio0_20", AM33XX_PIN_INPUT}, /* Pen down */
{"xdma_event_intr0.gpio0_19", AM33XX_PIN_INPUT}, /* 7843 busy (not used)*/
{NULL, 0}
/* SPI0 CS0 taken care of by SPI pinmux setup */
{"xdma_event_intr1.gpio0_20", AM33XX_PIN_INPUT}, /* Pen down */
{"xdma_event_intr0.gpio0_19", AM33XX_PIN_INPUT}, /* 7843 busy (not used)*/
{NULL, 0}
};
#endif
/* Module pin mux for mcasp1 */
static struct pinmux_config mcasp1_pin_mux[] = {
{"mcasp0_aclkr.mcasp1_aclkx", AM33XX_PIN_INPUT_PULLDOWN},
{"mcasp0_fsr.mcasp1_fsx", AM33XX_PIN_INPUT_PULLDOWN},
{"mcasp0_axr1.mcasp1_axr0", AM33XX_PIN_OUTPUT},
{"mcasp0_ahclkx.mcasp1_axr1", AM33XX_PIN_INPUT_PULLDOWN},
{"mii1_rxd0.mcasp1_ahclkr", AM33XX_PIN_INPUT_PULLDOWN},
{"rmii1_refclk.mcasp1_ahclkx", AM33XX_PIN_INPUT_PULLDOWN},
{NULL, 0},
{"mcasp0_aclkr.mcasp1_aclkx", AM33XX_PIN_INPUT_PULLDOWN},
{"mcasp0_fsr.mcasp1_fsx", AM33XX_PIN_INPUT_PULLDOWN},
{"mcasp0_axr1.mcasp1_axr0", AM33XX_PIN_OUTPUT},
{"mcasp0_ahclkx.mcasp1_axr1", AM33XX_PIN_INPUT_PULLDOWN},
{"mii1_rxd0.mcasp1_ahclkr", AM33XX_PIN_INPUT_PULLDOWN},
{"rmii1_refclk.mcasp1_ahclkx", AM33XX_PIN_INPUT_PULLDOWN},
{NULL, 0},
};
static struct pinmux_config i2c0_pin_mux[] = {
{"i2c0_sda.i2c0_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{"i2c0_scl.i2c0_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{NULL, 0},
{"i2c0_sda.i2c0_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{"i2c0_scl.i2c0_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{NULL, 0},
};
static struct pinmux_config spi0_pin_mux[] = {
{"spi0_cs0.spi0_cs0", AM33XX_PIN_OUTPUT_PULLUP},
{"spi0_cs1.spi0_cs1", AM33XX_PIN_OUTPUT_PULLUP},
{"spi0_sclk.spi0_sclk", AM33XX_PIN_OUTPUT_PULLUP},
{"spi0_d0.spi0_d0", AM33XX_PIN_OUTPUT},
{"spi0_d1.spi0_d1", AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
{NULL, 0},
{"spi0_cs0.spi0_cs0", AM33XX_PIN_OUTPUT_PULLUP},
{"spi0_cs1.spi0_cs1", AM33XX_PIN_OUTPUT_PULLUP},
{"spi0_sclk.spi0_sclk", AM33XX_PIN_OUTPUT_PULLUP},
{"spi0_d0.spi0_d0", AM33XX_PIN_OUTPUT},
{"spi0_d1.spi0_d1", AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
{NULL, 0},
};
static struct pinmux_config tsc_pin_mux[] = {
{"ain0.ain0", AM33XX_INPUT_EN},
{"ain1.ain1", AM33XX_INPUT_EN},
{"ain2.ain2", AM33XX_INPUT_EN},
{"ain3.ain3", AM33XX_INPUT_EN},
{"vrefp.vrefp", AM33XX_INPUT_EN},
{"vrefn.vrefn", AM33XX_INPUT_EN},
{NULL, 0},
{"ain0.ain0", AM33XX_INPUT_EN},
{"ain1.ain1", AM33XX_INPUT_EN},
{"ain2.ain2", AM33XX_INPUT_EN},
{"ain3.ain3", AM33XX_INPUT_EN},
{"vrefp.vrefp", AM33XX_INPUT_EN},
{"vrefn.vrefn", AM33XX_INPUT_EN},
{NULL, 0},
};
static struct pinmux_config wl12xx_pin_mux[] = {
{"gpmc_ad10.gpio0_26", AM33XX_PIN_INPUT}, /* WL WL IRQ */
{"gpmc_ad11.gpio0_27", AM33XX_PIN_INPUT}, /* WL SPI I/O RST */
{"gpmc_csn1.gpio1_30", AM33XX_PIN_INPUT_PULLUP}, /* WL IRQ */
{"gpmc_csn2.gpio1_31", AM33XX_PIN_OUTPUT}, /* BT RST ?*/
{NULL, 0},
{"gpmc_ad10.gpio0_26", AM33XX_PIN_INPUT}, /* WL WL IRQ */
{"gpmc_ad11.gpio0_27", AM33XX_PIN_INPUT}, /* WL SPI I/O RST */
{"gpmc_csn1.gpio1_30", AM33XX_PIN_INPUT_PULLUP}, /* WL IRQ */
{"gpmc_csn2.gpio1_31", AM33XX_PIN_OUTPUT}, /* BT RST ?*/
{NULL, 0},
};
#define AM335XEVM_WLAN_IRQ_GPIO GPIO_TO_PIN(0, 26)
#define AM335XEVM_WLAN_IRQ_GPIO GPIO_TO_PIN(0, 26)
struct wl12xx_platform_data am335x_wlan_data = {
.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
.board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
.board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
};
static struct omap2_hsmmc_info mmc_info[] __initdata = {
{
.mmc = 1,
.caps = MMC_CAP_4_BIT_DATA,
.gpio_cd = GPIO_TO_PIN(3, 3),
.gpio_wp = GPIO_TO_PIN(3, 0),
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
},
{
.mmc = 0, /* will be set at runtime */
},
{
.mmc = 0, /* will be set at runtime */
},
{} /* Terminator */
};
{
.mmc = 1,
.caps = MMC_CAP_4_BIT_DATA,
.gpio_cd = -EINVAL, // GPIO_TO_PIN(3, 3),
.gpio_wp = -EINVAL, //GPIO_TO_PIN(3, 0),
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
},
{
.mmc = 0, /* will be set at runtime */
},
{
.mmc = 0, /* will be set at runtime */
},
{} /* Terminator */
};
static __init void baseboard_setup_expansion(void)
{
setup_pin_mux(expansion_pin_mux);
setup_pin_mux(expansion_pin_mux);
}
static __init void baseboard_setup_can(void)
{
setup_pin_mux(can_pin_mux);
setup_pin_mux(can_pin_mux);
am33xx_d_can_init(0);
am33xx_d_can_init(1);
am33xx_d_can_init(0);
am33xx_d_can_init(1);
}
static struct omap_musb_board_data board_data = {
.interface_type = MUSB_INTERFACE_ULPI,
.mode = MUSB_OTG,
.power = 500,
.instances = 1,
.interface_type = MUSB_INTERFACE_ULPI,
.mode = MUSB_OTG,
.power = 500,
.instances = 1,
};
static __init void baseboard_setup_usb(void)
{
setup_pin_mux(usb_pin_mux);
usb_musb_init(&board_data);
setup_pin_mux(usb_pin_mux);
usb_musb_init(&board_data);
}
static __init void baseboard_setup_mmc(void)
{
/* pin mux */
setup_pin_mux(mmc0_pin_mux);
/* pin mux */
setup_pin_mux(mmc0_pin_mux);
/* configure mmc */
omap2_hsmmc_init(mmc_info);
/* configure mmc */
omap2_hsmmc_init(mmc_info);
}
static const struct display_panel disp_panel = {
WVGA, /* panel_type */
32, /* max_bpp */
16, /* min_bpp */
COLOR_ACTIVE, /* panel_shade */
WVGA, /* panel_type */
32, /* max_bpp */
16, /* min_bpp */
COLOR_ACTIVE, /* panel_shade */
};
static struct lcd_ctrl_config dvi_cfg = {
.p_disp_panel = &disp_panel,
.ac_bias = 255,
.ac_bias_intrpt = 0,
.dma_burst_sz = 16,
.bpp = 16,
.fdd = 0x80,
.tft_alt_mode = 0,
.stn_565_mode = 0,
.mono_8bit_mode = 0,
.invert_line_clock = 1,
.invert_frm_clock = 1,
.sync_edge = 0,
.sync_ctrl = 1,
.raster_order = 0,
.p_disp_panel = &disp_panel,
.ac_bias = 255,
.ac_bias_intrpt = 0,
.dma_burst_sz = 16,
.bpp = 16,
.fdd = 0x80,
.tft_alt_mode = 0,
.stn_565_mode = 0,
.mono_8bit_mode = 0,
.invert_line_clock = 1,
.invert_frm_clock = 1,
.sync_edge = 0,
.sync_ctrl = 1,
.raster_order = 0,
};
/* TODO - should really update driver to support VESA mode timings... */
struct da8xx_lcdc_platform_data dvi_pdata = {
.manu_name = "VESA",
.controller_data = &dvi_cfg,
.type = "800x600",
.manu_name = "VESA",
.controller_data = &dvi_cfg,
.type = "800x600",
};
#ifdef CONFIG_BACKLIGHT_TPS6116X
static struct platform_device tps6116x_device = {
.name = "tps6116x",
.id = -1,
.dev = {
.platform_data = (void*)MITY335X_DK_GPIO_BACKLIGHT,
},
.name = "tps6116x",
.id = -1,
.dev = {
.platform_data = (void*)MITY335X_DK_GPIO_BACKLIGHT,
},
};
#endif /* CONFIG_BACKLIGHT_TPS6116X */
#if (TS_USE_SPI)
static struct ads7846_platform_data ads7846_config = {
.model = 7843,
.vref_mv = 3300,
.x_max = 0x0fff,
.y_max = 0x0fff,
.x_plate_ohms = 180,
.pressure_max = 255,
.debounce_max = 0, //200,
.debounce_tol = 5,
.debounce_rep = 10,
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
.keep_vref_on = 1,
.irq_flags = IRQF_TRIGGER_FALLING,
.vref_delay_usecs = 100,
.settle_delay_usecs = 200,
.penirq_recheck_delay_usecs = 1000,
.filter_init = 0,
.filter = 0,
.filter_cleanup = 0,
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
.model = 7843,
.vref_mv = 3300,
.x_max = 0x0fff,
.y_max = 0x0fff,
.x_plate_ohms = 180,
.pressure_max = 255,
.debounce_max = 0, //200,
.debounce_tol = 5,
.debounce_rep = 10,
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
.keep_vref_on = 1,
.irq_flags = IRQF_TRIGGER_FALLING,
.vref_delay_usecs = 100,
.settle_delay_usecs = 200,
.penirq_recheck_delay_usecs = 1000,
.filter_init = 0,
.filter = 0,
.filter_cleanup = 0,
.gpio_pendown = MITY335X_DK_GPIO_TS_IRQ_N,
};
static __init void baseboard_setup_ts(void)
{
setup_pin_mux(ts_pin_mux);
/* SPI hookup already done by baseboard_setup_spi0() */
setup_pin_mux(ts_pin_mux);
/* SPI hookup already done by baseboard_setup_spi0() */
}
#else
static struct resource tsc_resources[] = {
[0] = {
.start = AM33XX_TSC_BASE,
.end = AM33XX_TSC_BASE + SZ_8K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AM33XX_IRQ_ADC_GEN,
.end = AM33XX_IRQ_ADC_GEN,
.flags = IORESOURCE_IRQ,
},
[0] = {
.start = AM33XX_TSC_BASE,
.end = AM33XX_TSC_BASE + SZ_8K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AM33XX_IRQ_ADC_GEN,
.end = AM33XX_IRQ_ADC_GEN,
.flags = IORESOURCE_IRQ,
},
};
static struct tsc_data am335x_touchscreen_data = {
.wires = 4,
.analog_input = 1,
.x_plate_resistance = 200,
.wires = 4,
.analog_input = 1,
.x_plate_resistance = 200,
};
static struct platform_device tsc_device = {
.name = "tsc",
.id = -1,
.dev = {
.platform_data = &am335x_touchscreen_data,
},
.num_resources = ARRAY_SIZE(tsc_resources),
.resource = tsc_resources,
.name = "tsc",
.id = -1,
.dev = {
.platform_data = &am335x_touchscreen_data,
},
.num_resources = ARRAY_SIZE(tsc_resources),
.resource = tsc_resources,
};
static __init void baseboard_setup_ts(void)
{
int err;
int err;
setup_pin_mux(tsc_pin_mux);
err = platform_device_register(&tsc_device);
if (err)
pr_err("failed to register touchscreen device\n");
setup_pin_mux(tsc_pin_mux);
err = platform_device_register(&tsc_device);
if (err)
pr_err("failed to register touchscreen device\n");
}
#endif /* CONFIG_TOUCHSCREEN_ADS7846 */
static __init void baseboard_setup_dvi(void)
{
struct clk *disp_pll;
struct clk *disp_pll;
/* pinmux */
setup_pin_mux(lcdc_pin_mux);
/* pinmux */
setup_pin_mux(lcdc_pin_mux);
/* add I2C1 device entry */
/* add I2C1 device entry */
/* TODO - really need to modify da8xx driver to support mating to the
* TFP410 and tweaking settings at the driver level... need to stew on
* this..
*/
/* TODO - really need to modify da8xx driver to support mating to the
* TFP410 and tweaking settings at the driver level... need to stew on
* this..
*/
/* configure / enable LCDC */
disp_pll = clk_get(NULL, "dpll_disp_ck");
if (IS_ERR(disp_pll)) {
pr_err("Connect get disp_pll\n");
return;
}
/* configure / enable LCDC */
disp_pll = clk_get(NULL, "dpll_disp_ck");
if (IS_ERR(disp_pll)) {
pr_err("Connect get disp_pll\n");
return;
}
if (clk_set_rate(disp_pll, 300000000)) {
pr_warning("%s: Unable to initialize display PLL.\n",
__func__);
goto out;
}
if (clk_set_rate(disp_pll, 300000000)) {
pr_warning("%s: Unable to initialize display PLL.\n",
__func__);
goto out;
}
if (am33xx_register_lcdc(&dvi_pdata))
pr_warning("%s: Unable to register LCDC device.\n",
__func__);
if (am33xx_register_lcdc(&dvi_pdata))
pr_warning("%s: Unable to register LCDC device.\n",
__func__);
#ifdef CONFIG_BACKLIGHT_TPS6116X
if (platform_device_register(&tps6116x_device))
pr_err("failed to register backlight device\n");
if (platform_device_register(&tps6116x_device))
pr_err("failed to register backlight device\n");
#else
/* backlight */
/* TEMPORARY until driver is ready... just jam it on! */
if(0 != gpio_request(MITY335X_DK_GPIO_BACKLIGHT, "backlight control")) {
pr_warning("Unable to request GPIO %d\n",MITY335X_DK_GPIO_BACKLIGHT);
goto out;
}
if(0 != gpio_direction_output(MITY335X_DK_GPIO_BACKLIGHT, 1) ){
pr_warning("Unable to set backlight GPIO %d ON\n",
MITY335X_DK_GPIO_BACKLIGHT);
goto out;
} else {
pr_info("Backlight GPIO = %d\n", MITY335X_DK_GPIO_BACKLIGHT);
}
/* backlight */
/* TEMPORARY until driver is ready... just jam it on! */
if(0 != gpio_request(MITY335X_DK_GPIO_BACKLIGHT, "backlight control")) {
pr_warning("Unable to request GPIO %d\n",MITY335X_DK_GPIO_BACKLIGHT);
goto out;
}
if(0 != gpio_direction_output(MITY335X_DK_GPIO_BACKLIGHT, 1) ){
pr_warning("Unable to set backlight GPIO %d ON\n",
MITY335X_DK_GPIO_BACKLIGHT);
goto out;
} else {
pr_info("Backlight GPIO = %d\n", MITY335X_DK_GPIO_BACKLIGHT);
}
#endif // CONFIG_BACKLIGHT_TPS6116X
out:
clk_put(disp_pll);
clk_put(disp_pll);
}
static u8 am335x_iis_serializer_direction[] = {
TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
};
static struct snd_platform_data baseboard_snd_data = {
.tx_dma_offset = 0x46400000, /* McASP1 */
.rx_dma_offset = 0x46400000,
.op_mode = DAVINCI_MCASP_IIS_MODE,
.num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction),
.tdm_slots = 2,
.serial_dir = am335x_iis_serializer_direction,
.asp_chan_q = EVENTQ_2,
.version = MCASP_VERSION_3,
.txnumevt = 1,
.rxnumevt = 1,
.tx_dma_offset = 0x46400000, /* McASP1 */
.rx_dma_offset = 0x46400000,
.op_mode = DAVINCI_MCASP_IIS_MODE,
.num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction),
.tdm_slots = 2,
.serial_dir = am335x_iis_serializer_direction,
.asp_chan_q = EVENTQ_2,
.version = MCASP_VERSION_3,
.txnumevt = 1,
.rxnumevt = 1,
};
static struct omap2_mcspi_device_config spi0_ctlr_data = {
.turbo_mode = 0, /* diable "turbo" mode */
.single_channel = 1, /* 0: slave, 1: master */
.d0_is_mosi = 1, /* D0 is output from 3335X */
.turbo_mode = 0, /* diable "turbo" mode */
.single_channel = 1, /* 0: slave, 1: master */
.d0_is_mosi = 1, /* D0 is output from 3335X */
};
static struct spi_board_info baseboard_spi0_slave_info[] = {
{
.modalias = "tlv320aic26-codec",
.controller_data = &spi0_ctlr_data,
.irq = -1,
.max_speed_hz = 2000000,
.bus_num = 1,
.chip_select = 1,
.mode = SPI_MODE_1,
},
{
.modalias = "tlv320aic26-codec",
.controller_data = &spi0_ctlr_data,
.irq = -1,
.max_speed_hz = 2000000,
.bus_num = 1,
.chip_select = 1,
.mode = SPI_MODE_1,
},
#if (TS_USE_SPI)
{
.modalias = "ads7846",
.bus_num = MITY335X_DK_SPIBUS_TS,
.chip_select = 0,
.max_speed_hz = 1500000,
.controller_data = &spi0_ctlr_data,
.irq = OMAP_GPIO_IRQ(MITY335X_DK_GPIO_TS_IRQ_N),
.platform_data = &ads7846_config,
}
{
.modalias = "ads7846",
.bus_num = MITY335X_DK_SPIBUS_TS,
.chip_select = 0,
.max_speed_hz = 1500000,
.controller_data = &spi0_ctlr_data,
.irq = OMAP_GPIO_IRQ(MITY335X_DK_GPIO_TS_IRQ_N),
.platform_data = &ads7846_config,
}
#endif /* TS_USE_SPI */
};
static __init void baseboard_setup_audio(void)
{
pr_info("Configuring audio...\n");
setup_pin_mux(mcasp1_pin_mux);
am335x_register_mcasp1(&baseboard_snd_data);
pr_info("Configuring audio...\n");
setup_pin_mux(mcasp1_pin_mux);
am335x_register_mcasp1(&baseboard_snd_data);
}
static __init void baseboard_setup_spi0_devices(void)
{
setup_pin_mux(spi0_pin_mux);
spi_register_board_info(baseboard_spi0_slave_info,
ARRAY_SIZE(baseboard_spi0_slave_info));
setup_pin_mux(spi0_pin_mux);
spi_register_board_info(baseboard_spi0_slave_info,
ARRAY_SIZE(baseboard_spi0_slave_info));
baseboard_setup_audio();
baseboard_setup_ts();
baseboard_setup_audio();
baseboard_setup_ts();
}
static void __init baseboard_i2c0_init(void)
{
setup_pin_mux(i2c0_pin_mux);
omap_register_i2c_bus(1, 100, NULL, 0);
setup_pin_mux(i2c0_pin_mux);
omap_register_i2c_bus(1, 100, NULL, 0);
}
/* fixup for the Vitesse 8601 PHY on the MityARM335x dev kit.
......
*/
static int am335x_vsc8601_phy_fixup(struct phy_device *phydev)
{
unsigned int val;
pr_info("am335x_vsc8601_phy_fixup %x here addr = %d\n",
phydev->phy_id, phydev->addr);
/* skew control is in extended register set */
if (phy_write(phydev, MII_EXTPAGE, 1) < 0) {
pr_err("Error enabling extended PHY regs\n");
return 1;
}
/* read the skew */
val = phy_read(phydev, RGMII_SKEW);
if (val < 0) {
pr_err("Error reading RGMII skew reg\n");
return val;
}
val &= 0x0FFF; /* clear skew values */
val |= 0x3000; /* 0 Tx skew, 2.0ns Rx skew */
if (phy_write(phydev, RGMII_SKEW, val) < 0) {
pr_err("failed to write RGMII_SKEW\n");
return 1;
}
/* disable the extended page access */
if (phy_write(phydev, MII_EXTPAGE, 0) < 0) {
pr_err("Error disabling extended PHY regs\n");
return 1;
}
return 0;
unsigned int val;
pr_info("am335x_vsc8601_phy_fixup %x here addr = %d\n",
phydev->phy_id, phydev->addr);
/* skew control is in extended register set */
if (phy_write(phydev, MII_EXTPAGE, 1) < 0) {
pr_err("Error enabling extended PHY regs\n");
return 1;
}
/* read the skew */
val = phy_read(phydev, RGMII_SKEW);
if (val < 0) {
pr_err("Error reading RGMII skew reg\n");
return val;
}
val &= 0x0FFF; /* clear skew values */
val |= 0x3000; /* 0 Tx skew, 2.0ns Rx skew */
if (phy_write(phydev, RGMII_SKEW, val) < 0) {
pr_err("failed to write RGMII_SKEW\n");
return 1;
}
/* disable the extended page access */
if (phy_write(phydev, MII_EXTPAGE, 0) < 0) {
pr_err("Error disabling extended PHY regs\n");
return 1;
}
return 0;
}
static __init void baseboard_setup_enet(void)
{
/* pinmux */
setup_pin_mux(rgmii2_pin_mux);
/* network configuration done in SOM code */
/* PHY address setup? */
/* Register PHY fixup to adjust rx clock skew */
phy_register_fixup_for_uid(VSC8601_PHY_ID,
VSC8601_PHY_MASK,
am335x_vsc8601_phy_fixup);
/* pinmux */
setup_pin_mux(rmii2_pin_mux);
/* network configuration done in SOM code */
/* PHY address setup? */
/* Register PHY fixup to adjust rx clock skew */
phy_register_fixup_for_uid(VSC8601_PHY_ID,
VSC8601_PHY_MASK,
am335x_vsc8601_phy_fixup);
}
......
static void mmc2_wl12xx_init(void)
{
setup_pin_mux(mmc2_pin_mux);
mmc_info[1].mmc = 3;
mmc_info[1].name = "wl1271";
mmc_info[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
| MMC_PM_KEEP_POWER;
mmc_info[1].nonremovable = true;
mmc_info[1].gpio_cd = -EINVAL;
mmc_info[1].gpio_wp = -EINVAL;
mmc_info[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
/* mmc will be initialized when mmc0_init is called */
return;
setup_pin_mux(mmc2_pin_mux);
mmc_info[1].mmc = 3;
mmc_info[1].name = "wl1271";
mmc_info[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
| MMC_PM_KEEP_POWER;
mmc_info[1].nonremovable = true;
mmc_info[1].gpio_cd = -EINVAL;
mmc_info[1].gpio_wp = -EINVAL;
mmc_info[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
/* mmc will be initialized when mmc0_init is called */
return;
}
static void wl12xx_bluetooth_enable(void)
{
#if 0
int status = gpio_request(am335x_wlan_data.bt_enable_gpio,
"bt_en\n");
if (status < 0)
pr_err("Failed to request gpio for bt_enable");
int status = gpio_request(am335x_wlan_data.bt_enable_gpio,
"bt_en\n");
if (status < 0)
pr_err("Failed to request gpio for bt_enable");
pr_info("Configure Bluetooth Enable pin...\n");
gpio_direction_output(am335x_wlan_data.bt_enable_gpio, 0);
pr_info("Configure Bluetooth Enable pin...\n");
gpio_direction_output(am335x_wlan_data.bt_enable_gpio, 0);
#else
pr_info("Bluetooth not Enabled!\n");
pr_info("Bluetooth not Enabled!\n");
#endif
}
static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
{
#if 1 /* TJI - 5/24/12 WL enable not connected yet.. always on */
if (on) {
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 1);
mdelay(70);
}
else
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 0);
#if 1 /* TJI - 5/24/12 WL enable not connected yet.. always on */
if (on) {
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 1);
mdelay(70);
}
else
gpio_set_value(am335x_wlan_data.wlan_enable_gpio, 0);
#endif
return 0;
return 0;
}
static void baseboard_setup_wlan(void)
{
struct device *dev;
struct omap_mmc_platform_data *pdata;
int ret;
struct device *dev;
struct omap_mmc_platform_data *pdata;
int ret;
/* Register WLAN and BT enable pins based on the evm board revision */
am335x_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(3,4);
am335x_wlan_data.bt_enable_gpio = -EINVAL;
/* Register WLAN and BT enable pins based on the evm board revision */
am335x_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(3,4);
am335x_wlan_data.bt_enable_gpio = -EINVAL;
pr_info("WLAN GPIO Info.. IRQ = %3d WL_EN = %3d BT_EN = %3d\n",
am335x_wlan_data.irq,
am335x_wlan_data.wlan_enable_gpio,
am335x_wlan_data.bt_enable_gpio);
am335x_wlan_data.irq,
am335x_wlan_data.wlan_enable_gpio,
am335x_wlan_data.bt_enable_gpio);
wl12xx_bluetooth_enable();
if (wl12xx_set_platform_data(&am335x_wlan_data))
pr_err("error setting wl12xx data\n");
dev = mmc_info[1].dev;
if (!dev) {
pr_err("wl12xx mmc device initialization failed\n");
goto out;
}
pdata = dev->platform_data;
if (!pdata) {
pr_err("Platfrom data of wl12xx device not set\n");
goto out;
}
wl12xx_bluetooth_enable();
if (wl12xx_set_platform_data(&am335x_wlan_data))
pr_err("error setting wl12xx data\n");
dev = mmc_info[1].dev;
if (!dev) {
pr_err("wl12xx mmc device initialization failed\n");
goto out;
}
pdata = dev->platform_data;
if (!pdata) {
pr_err("Platfrom data of wl12xx device not set\n");
goto out;
}
#if 1
ret = gpio_request_one(am335x_wlan_data.wlan_enable_gpio,
GPIOF_OUT_INIT_LOW, "wlan_en");
if (ret) {
pr_err("Error requesting wlan enable gpio: %d\n", ret);
goto out;
}
ret = gpio_request_one(am335x_wlan_data.wlan_enable_gpio,
GPIOF_OUT_INIT_LOW, "wlan_en");
if (ret) {
pr_err("Error requesting wlan enable gpio: %d\n", ret);
goto out;
}
#endif
setup_pin_mux(wl12xx_pin_mux);
setup_pin_mux(wl12xx_pin_mux);
pdata->slots[0].set_power = wl12xx_set_power;
pr_info("baseboard_setup_wlan: finished\n");
pdata->slots[0].set_power = wl12xx_set_power;
pr_info("baseboard_setup_wlan: finished\n");
out:
return;
return;
}
static __init int baseboard_init(void)
{
pr_info("%s [%s]...\n", __func__, BASEBOARD_NAME);
pr_info("%s [%s]...\n", __func__, BASEBOARD_NAME);
baseboard_setup_enet();
baseboard_setup_enet();
mmc2_wl12xx_init();
mmc2_wl12xx_init();
baseboard_setup_mmc();
baseboard_setup_mmc();
baseboard_setup_usb();
baseboard_setup_usb();
baseboard_setup_dvi();
baseboard_setup_dvi();
baseboard_setup_can();
baseboard_setup_can();
baseboard_setup_spi0_devices();
baseboard_setup_spi0_devices();
baseboard_i2c0_init();
baseboard_i2c0_init();
baseboard_setup_wlan();
baseboard_setup_wlan();
baseboard_setup_expansion();
baseboard_setup_expansion();
return 0;
return 0;
}
arch_initcall_sync(baseboard_init);
arch/arm/mach-omap2/board-mityarm335x.c
/* module pin mux structure */
struct pinmux_config {
const char *string_name; /* signal name format */
int val; /* Options for the mux register value */
const char *string_name; /* signal name format */
int val; /* Options for the mux register value */
};
static struct omap_board_config_kernel mityarm335x_config[] __initdata = {
};
#define EEPROM_MAC_ADDRESS_OFFSET 60 /* 4+8+4+12+32 */
#define EEPROM_NO_OF_MAC_ADDR 3
#define EEPROM_MAC_ADDRESS_OFFSET 60 /* 4+8+4+12+32 */
#define EEPROM_NO_OF_MAC_ADDR 3
#define FACTORY_CONFIG_MAGIC 0x012C0138
#define FACTORY_CONFIG_VERSION 0x00010001
struct factory_config {
u32 magic;
u32 version;
u8 mac[6];
u32 reserved;
u32 spare;
u32 serialnumber;
char partnum[32];
u32 magic;
u32 version;
u8 mac[6];
u32 reserved;
u32 spare;
u32 serialnumber;
char partnum[32];
};
static struct factory_config factory_config;
/* Pin mux for on board nand flash */
static struct pinmux_config nand_pin_mux[] = {
{"gpmc_ad0.gpmc_ad0", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad1.gpmc_ad1", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad2.gpmc_ad2", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad3.gpmc_ad3", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad4.gpmc_ad4", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad5.gpmc_ad5", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad6.gpmc_ad6", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad7.gpmc_ad7", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_wait0.gpmc_wait0", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_wpn.gpmc_wpn", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_csn0.gpmc_csn0", AM33XX_PULL_DISA},
{"gpmc_advn_ale.gpmc_advn_ale", AM33XX_PULL_DISA},
{"gpmc_oen_ren.gpmc_oen_ren", AM33XX_PULL_DISA},
{"gpmc_wen.gpmc_wen", AM33XX_PULL_DISA},
{"gpmc_ben0_cle.gpmc_ben0_cle", AM33XX_PULL_DISA},
{NULL, 0},
{"gpmc_ad0.gpmc_ad0", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad1.gpmc_ad1", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad2.gpmc_ad2", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad3.gpmc_ad3", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad4.gpmc_ad4", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad5.gpmc_ad5", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad6.gpmc_ad6", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad7.gpmc_ad7", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_wait0.gpmc_wait0", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_wpn.gpmc_wpn", AM33XX_PIN_INPUT_PULLUP},
{"gpmc_csn0.gpmc_csn0", AM33XX_PULL_DISA},
{"gpmc_advn_ale.gpmc_advn_ale", AM33XX_PULL_DISA},
{"gpmc_oen_ren.gpmc_oen_ren", AM33XX_PULL_DISA},
{"gpmc_wen.gpmc_wen", AM33XX_PULL_DISA},
{"gpmc_ben0_cle.gpmc_ben0_cle", AM33XX_PULL_DISA},
{NULL, 0},
};
/* Module pin mux for SPI fash */
static struct pinmux_config spi1_pin_mux[] = {
{"ecap0_in_pwm0_out.spi1_sclk", AM33XX_PULL_ENBL | AM33XX_INPUT_EN },
{"mcasp0_fsx.spi1_d0", AM33XX_PULL_ENBL | AM33XX_PULL_UP |
AM33XX_INPUT_EN },
{"mcasp0_axr0.spi1_d1", AM33XX_PULL_ENBL | AM33XX_INPUT_EN },
{"mcasp0_ahclkr.spi1_cs0", AM33XX_PULL_ENBL | AM33XX_PULL_UP |
AM33XX_INPUT_EN },
{NULL, 0},
{"ecap0_in_pwm0_out.spi1_sclk", AM33XX_PULL_ENBL | AM33XX_INPUT_EN },
{"mcasp0_fsx.spi1_d0", AM33XX_PULL_ENBL | AM33XX_PULL_UP |
AM33XX_INPUT_EN },
{"mcasp0_axr0.spi1_d1", AM33XX_PULL_ENBL | AM33XX_INPUT_EN },
{"mcasp0_ahclkr.spi1_cs0", AM33XX_PULL_ENBL | AM33XX_PULL_UP |
AM33XX_INPUT_EN },
{NULL, 0},
};
/*
......
* SDASR_EN2 (pins 11/10, ID0) of TPS65910. Also goes to edge connector.
*/
static struct pinmux_config i2c1_pin_mux[] = {
{"mii1_crs.i2c1_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{"mii1_rxerr.i2c1_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{NULL, 0},
{"mii1_crs.i2c1_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{"mii1_rxerr.i2c1_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{NULL, 0},
};
/*
......
* of TPS65910. Does not leave module.
*/
static struct pinmux_config i2c2_pin_mux[] = {
{"uart1_ctsn.i2c2_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{"uart1_rtsn.i2c2_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{NULL, 0},
{"uart1_ctsn.i2c2_sda", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{"uart1_rtsn.i2c2_scl", AM33XX_SLEWCTRL_SLOW | AM33XX_PULL_ENBL |
AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT},
{NULL, 0},
};
/*
* @pin_mux - single module pin-mux structure which defines pin-mux
* details for all its pins.
* details for all its pins.
*/
static void setup_pin_mux(struct pinmux_config *pin_mux)
{
int i;
int i;
for (i = 0; pin_mux->string_name != NULL; pin_mux++)
omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
for (i = 0; pin_mux->string_name != NULL; pin_mux++)
omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
}
/* NAND partition information */
static struct mtd_partition mityarm335x_nand_partitions[] = {
/* All the partition sizes are listed in terms of NAND block size */
{
.name = "SPL",
.offset = 0, /* Offset = 0x0 */
.size = SZ_128K,
},
{
.name = "SPL.backup1",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */
.size = SZ_128K,
},
{
.name = "SPL.backup2",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x40000 */
.size = SZ_128K,
},
{
.name = "SPL.backup3",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */
.size = SZ_128K,
},
{
.name = "U-Boot",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
.size = 15 * SZ_128K,
},
{
.name = "U-Boot Env",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
.size = 1 * SZ_128K,
},
{
.name = "Kernel",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
.size = 40 * SZ_128K,
},
{
.name = "File System",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
.size = MTDPART_SIZ_FULL,
},
{
.name = "SPL",
.offset = 0, /* Offset = 0x0 */
.size = SZ_128K,
},
{
.name = "SPL.backup1",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */
.size = SZ_128K,
},
{
.name = "SPL.backup2",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x40000 */
.size = SZ_128K,
},
{
.name = "SPL.backup3",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */
.size = SZ_128K,
},
{
.name = "U-Boot",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
.size = 15 * SZ_128K,
},
{
.name = "U-Boot Env",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
.size = 1 * SZ_128K,
},
{
.name = "Kernel",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
.size = 40 * SZ_128K,
},
{
.name = "File System",
.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
.size = MTDPART_SIZ_FULL,
},
};
static void mityarm335x_nand_init(void)
{
setup_pin_mux(nand_pin_mux);
board_nand_init(mityarm335x_nand_partitions,
ARRAY_SIZE(mityarm335x_nand_partitions), 0, 0);
setup_pin_mux(nand_pin_mux);
board_nand_init(mityarm335x_nand_partitions,
ARRAY_SIZE(mityarm335x_nand_partitions), 0, 0);
}
/* SPI flash information (reserved for user applications) */
static struct mtd_partition mityarm335x_spi_partitions[] = {
{
.name = "NOR User Defined",
.offset = 0,
.size = MTDPART_SIZ_FULL,
}
{
.name = "NOR User Defined",
.offset = 0,
.size = MTDPART_SIZ_FULL,
}
};
static const struct flash_platform_data mityarm335x_spi_flash = {
.name = "spi_flash",
.parts = mityarm335x_spi_partitions,
.nr_parts = ARRAY_SIZE(mityarm335x_spi_partitions),
.type = "m25p64-nonjedec",
.name = "spi_flash",
.parts = mityarm335x_spi_partitions,
.nr_parts = ARRAY_SIZE(mityarm335x_spi_partitions),
.type = "m25p64-nonjedec",
};
static const struct omap2_mcspi_device_config spi1_ctlr_data = {
.turbo_mode = 0,
.single_channel = 0,
.d0_is_mosi = 1,
.turbo_mode = 0,
.single_channel = 0,
.d0_is_mosi = 1,
};
/*
* On board SPI NOR FLASH
*/
static struct spi_board_info mityarm335x_spi1_slave_info[] = {
{
.modalias = "m25p80",
.platform_data = &mityarm335x_spi_flash,
.controller_data = (void*)&spi1_ctlr_data,
.irq = -1,
.max_speed_hz = 30000000,
.bus_num = 2,
.chip_select = 0,
.mode = SPI_MODE_3,
},
{
.modalias = "m25p80",
.platform_data = &mityarm335x_spi_flash,
.controller_data = (void*)&spi1_ctlr_data,
.irq = -1,
.max_speed_hz = 30000000,
.bus_num = 2,
.chip_select = 0,
.mode = SPI_MODE_3,
},
};
/* setup spi1 */
static void spi1_init(void)
{
setup_pin_mux(spi1_pin_mux);
spi_register_board_info(mityarm335x_spi1_slave_info,
ARRAY_SIZE(mityarm335x_spi1_slave_info));
return;
setup_pin_mux(spi1_pin_mux);
spi_register_board_info(mityarm335x_spi1_slave_info,
ARRAY_SIZE(mityarm335x_spi1_slave_info));
return;
}
static struct regulator_init_data am335x_dummy;
static struct regulator_consumer_supply am335x_vdd1_supply[] = {
REGULATOR_SUPPLY("mpu", "mpu.0"),
REGULATOR_SUPPLY("mpu", "mpu.0"),
};
static struct regulator_init_data am335x_vdd1 = {
.constraints = {
.min_uV = 600000,
.max_uV = 1500000,
.valid_modes_mask = REGULATOR_MODE_NORMAL,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
.always_on = 1,
},
.num_consumer_supplies = ARRAY_SIZE(am335x_vdd1_supply),
.consumer_supplies = am335x_vdd1_supply,
.constraints = {
.min_uV = 600000,
.max_uV = 1500000,
.valid_modes_mask = REGULATOR_MODE_NORMAL,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
.always_on = 1,
},
.num_consumer_supplies = ARRAY_SIZE(am335x_vdd1_supply),
.consumer_supplies = am335x_vdd1_supply,
};
static struct tps65910_board mityarm335x_tps65910_info = {
.tps65910_pmic_init_data[TPS65910_REG_VRTC] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VIO] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VDD1] = &am335x_vdd1,
.tps65910_pmic_init_data[TPS65910_REG_VDD2] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VDD3] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VPLL] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VDAC] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VMMC] = &am335x_dummy,
.tps65910_pmic_init_data[TPS65910_REG_VRTC] = &am335x_dummy,
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