Project

General

Profile

Activity

From 01/19/2011 to 02/17/2011

01/28/2011

09:12 AM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?
Hi Ms. Begley,
We're currently in the process of working on an automated release process for these files, so for n...
Gregory Gluszek

01/27/2011

01:44 PM Software Development: Where can I get the files listed on the DSPLink Hello World wiki?
Hi there!
Sorry, I seem to be missing something. Where can I find the files listed on the http://support.critical...
Susan Begley

01/22/2011

08:06 AM FPGA Development: RE: OMAP-L138 EMA_WE vs. EMA_A_RW documentation descrepancy, usage
Yes. The revision I was looking at was indeed old. I don't know why the RNW pin isn't working for you. You might t... Michael Williamson

01/21/2011

05:37 PM FPGA Development: RE: OMAP-L138 EMA_WE vs. EMA_A_RW documentation descrepancy, usage
Is there a chance you're looking at an older version of the document? The current version at the link you provided do... Dene Olsen
01:48 PM FPGA Development: RE: OMAP-L138 EMA_WE vs. EMA_A_RW documentation descrepancy, usage
Ah. Sorry.
According to the "EMIFA Users Guide":http://www.ti.com/litv/pdf/sprufl6f, the EMA_A_RNW is only shown ...
Michael Williamson
01:36 PM FPGA Development: RE: OMAP-L138 EMA_WE vs. EMA_A_RW documentation descrepancy, usage
Mike,
I understand the pin muxing requirements during the FPGA loading process versus normal operation. My questi...
david kasper
01:30 PM FPGA Development: RE: OMAP-L138 EMA_WE vs. EMA_A_RW documentation descrepancy, usage
Hi David,
The EMA_RNW signal needs to be configured as a GPIO during an FPGA program cycle (see the fpga_ctrl.c fi...
Michael Williamson
12:08 PM FPGA Development: RE: OMAP-L138 EMA_WE vs. EMA_A_RW documentation descrepancy, usage
Mike,
FYI I am providing software support for Dene and have reconfigured the pin-mux setting for GP3[9] from GPIO ...
david kasper
04:41 PM Software Development: RE: Loading FPGA
Mike,
The other issue is now resolved; our HW designer rebuilt the Xilinx image per your instructions which fixed ...
david kasper
04:17 PM Software Development: RE: Loading FPGA
Mike,
You are correct and it looks like I have everything that I need.
Thank Again!
Dave
>>>>>>>>>> Direc...
david kasper
03:37 PM Software Development: RE: Loading FPGA
Hi Dave,
"/etc/rc5.d" should be a directory. It should not be empty. Below is a listing of this directory for a ...
Michael Williamson
03:07 PM Software Development: RE: Loading FPGA
Mike,
The file "/etc/rc5.d" is present but empty. Let me know if you have any other suggestions.
Thanks,
Dave
david kasper
01:33 PM Software Development: RE: Loading FPGA
Ok,
Perhaps CL helped someone out there with this. The scripts for loading at runlevel 5 should be contained in /...
Michael Williamson
01:30 PM Software Development: RE: Loading FPGA
Mike,
Thanks for your response. I didn't configure the board to load the FPGA and it isn't performed during u-boo...
david kasper
01:18 PM Software Development: RE: Loading FPGA
Hi David,
On 1), I suspect that the FPGA bin image may not be getting generated correctly. If you have a bit file...
Michael Williamson
12:57 PM Software Development: RE: Loading FPGA
Mike,
I have built fpga_ctrl.ko from the source snapshot and am using program_fpga.sh to load the Xilinx FPGA. I ...
david kasper
03:42 PM Software Development: RE: u-boot build question
Dave,
Sorry about the delay on this response.
Under ubuntu 10.04, you need to install the "uboot-mkimage" pac...
Michael Williamson

01/19/2011

07:54 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux
Mike,
Thanks for your help and sorry for the late response. I determined that SD cards worked on the CriticalLink...
david kasper
05:22 PM Software Development: RE: JTAG setup for CCSv3?
Hi Mr. Szuch,
Blackhawk provides drivers for connecting to the OMAP-L138. This will give you the option for conne...
Gregory Gluszek
 

Also available in: Atom

Go to top
Add picture from clipboard (Maximum size: 1 GB)