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From 06/11/2014 to 07/10/2014

07/03/2014

02:45 PM Software Development: RE: uPP delay between transmissions
It was a cache invalidation issue. Calling BCACHE_wb() solved the problem.
I did find a small bug in the trasmit()...
Udi Fuchs
08:29 AM Software Development: RE: uPP delay between transmissions
My first thought on seeing this is that it is probably a cache issue. After you set the values in the buffer, the va... David Rice

07/02/2014

06:47 PM Software Development: RE: uPP delay between transmissions
We cannot get the uPP to work. For test we just use the FPGA to pass the uPP pins to FPGA output pin. The Enable pin ... Udi Fuchs
07:19 AM Software Development: RE: uPP delay between transmissions
Ah, yes, I am sorry I forgot about the EMIFA scheduling delays. You are correct.
If you are using the reference P...
Michael Williamson
12:55 AM Software Development: RE: uPP delay between transmissions
We started with EMIFA. We got a delay of 11uSec between transfers as discussed in this post:
https://support.criti...
Udi Fuchs
11:49 AM Software Development: RE: Linker error on DSP application with Code Composer 6
Thanks a lot to everybody.
It was a simple linker problem.
Silvano
Silvano Bertoldo
11:49 AM Software Development: MSGQ - Message Queue Manager problem
Hello everybody.
We see an unexpected behaviour during simple debugging operations.
/*
* main.c
*/
#incl...
Silvano Bertoldo

07/01/2014

04:30 PM Software Development: RE: Linker error on DSP application with Code Composer 6
Note i found the generic c674x device under target: generic devices
!DSP_C674x.png!
Jonathan Cormier
03:39 PM Software Development: RE: Linker error on DSP application with Code Composer 6
Silvano,
Have you followed our guide to building a Hello World application?
https://support.criticallink.com/re...
Greg Dias
11:55 AM Software Development: Linker error on DSP application with Code Composer 6
Dear all,
we are trying to build a simple application on DSP using Code Composer 6 plus DSP/BIOS.
In the followi...
Silvano Bertoldo

06/30/2014

04:18 PM Software Development: RE: uPP delay between transmissions
Have you tried just writing to the FPGA via EMIFA? That would be a 16 2-byte word transfer. Even with 10 wait state... Michael Williamson
03:11 PM Software Development: RE: uPP delay between transmissions
Re-architecting our code is not really a vaiable solution. We have a feedback loop running in the DSP, that depends o... Udi Fuchs

06/28/2014

04:22 AM Software Development: RE: uPP delay between transmissions
Hello,
First of all, using such small packet size you may not be able to completely eliminate the delay between s...
Gregory Gluszek

06/27/2014

08:36 PM Software Development: uPP delay between transmissions
We are trying to use uPP to send data from the DSP to the FPGA. The problem is that there is a delay of about 8 micro... Udi Fuchs

06/26/2014

11:22 AM Software Development: RE: SSD on MityDSP-L138F
Hannes,
As mentioned in the errata, they do not recommend the "reset" approach because they cannot guarantee that ...
Bob Duke
08:25 AM Software Development: RE: Where to download the document about Memory Map and Register Address of IO Board 80-000268RI-2C and OMAPL138F
These are provided by TI. You can find them here: http://www.ti.com/product/OMAP-L138/technicaldocuments
You shoul...
Jonathan Cormier
08:16 AM Software Development: RE: Where to download the document about Memory Map and Register Address of IO Board 80-000268RI-2C and OMAPL138F
The memory map of the OMAP-L138 can be found on TI's main "OMAP-L138 web page":http://www.ti.com/product/omap-l138 (s... Michael Williamson

06/25/2014

10:58 PM Software Development: Where to download the document about Memory Map and Register Address of IO Board 80-000268RI-2C and OMAPL138F
only some brief documents are found in wiki,
Where can I download the document about Memory Map and Register Address...
yanqing lu
04:02 PM FPGA Development: RE: DSP to FPGA SPI Setup Question
Hello,Mike
Thank you very much.
lijun yang
12:42 PM FPGA Development: RE: DSP to FPGA SPI Setup Question
What is your target update rate? Continuous?
You might try first to rip out all of the overhead on the tcDspFpgaS...
Michael Williamson
11:32 AM FPGA Development: RE: DSP to FPGA SPI Setup Question
Hello,Mike
Thank you for your help.
I have attached two pic
----one is the SPI bits transfer rate(This is our des...
lijun yang
10:47 AM FPGA Development: RE: DSP to FPGA SPI Setup Question
Can you check with a scope at what the clock rate is on the SPI device, and the interword write delay? I just want t... Michael Williamson
10:39 AM FPGA Development: RE: DSP to FPGA SPI Setup Question
Update and followup question from the customer:
We have made the SPI work, but transmitting the word to word is sl...
Alexander Block
12:01 PM Software Development: RE: Interrupting the ARM from the DSP
Thanks. This does what I wanted.
On the DSP side:...
Mary Frantz
09:11 AM Software Development: RE: Interrupting the ARM from the DSP
I think that you are confusing signals and interrupts a bit.
You need to write some kernel module code to register...
Michael Williamson
08:26 AM Software Development: RE: Interrupting the ARM from the DSP
Yes, I am familiar with DSPLink and am using it. However, I have time requirement that DSPLink cannot meet. Polling ... Mary Frantz
08:01 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
There you are. Note that i had to change the initialization in the code as noted above. Hannes Klas
07:26 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
If you don't mind, could you post your config.gz file? Michael Williamson
05:37 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Hey again,
i tried changing it from DMA to PIO. Now, everything seems to work. Device is readable, writable and mo...
Hannes Klas
05:41 AM Software Development: SSD on MityDSP-L138F
Hey folks,
I'm trying to use a SSD instead of a HDD on the L138F.
I found in the errata that the OMAP-L138 has...
Hannes Klas
02:12 AM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
Jonathan, thank you, I will track your branch. Andrey Mozzhuhin

06/24/2014

05:41 PM Software Development: RE: Interrupting the ARM from the DSP
Hello Mary,
I'm not sure what the problem is in your specific example as we almost always use DSPLink to to commu...
Gregory Gluszek
02:08 PM Software Development: Interrupting the ARM from the DSP
I would like to have the DSP (running BIOS 5) interrupt the ARM (running Linux MDK_2012-08-10)
In the DSP Code:
...
Mary Frantz
12:04 PM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
Andrey,
Not sure if its any help but I've pushed a work in progress 3.14 branch to our git. Its based off the main...
Jonathan Cormier

06/23/2014

10:25 AM PCB Development: RE: MityDSP-L138 processor running hot
All unused connections are no connects.
Ed Smith
09:59 AM PCB Development: RE: MityDSP-L138 processor running hot
I have attached a plot showing the rise of the supply on the baseboard (channel 2) and the Mity card (channel 1). As ... Ed Smith
09:54 AM PCB Development: RE: MityDSP-L138 processor running hot
What are you doing with unused connections on the module?
Michael Williamson
09:52 AM PCB Development: RE: MityDSP-L138 processor running hot
It remains hot until the next power cycle. A reset cycle alone does not give an improvement.
Ed Smith
09:15 AM PCB Development: RE: MityDSP-L138 processor running hot
On non-FPGA variants, DVDD3318_A, DVDD3318_B, and DVDD3318_C are all tied to 3.3V.
Does the issue only occur durin...
Michael Williamson
09:07 AM PCB Development: RE: MityDSP-L138 processor running hot
All our I/O to the card is 3.3V. The OMAP processor has 3 configurable power groups which can be connected to 3.3V or... Ed Smith
07:56 AM PCB Development: RE: MityDSP-L138 processor running hot
Ok.
I suspect the issue may be related to I/O voltage levels (you have I/Os being driven or pulled to a value larg...
Michael Williamson
07:51 AM PCB Development: RE: MityDSP-L138 processor running hot
We are using a baseboard developed for our application. I'm happy to share the schematic. Let me know how to get that... Ed Smith
07:06 AM PCB Development: RE: MityDSP-L138 processor running hot
Hi Ed,
Are you running on a DevKit or on a custom board? Would you be willing to share your schematic (privately ...
Michael Williamson
05:32 AM PCB Development: MityDSP-L138 processor running hot
We are some way into the development of using the MityDSP-L138 platform. I recently noticed that about 50% of the tim... Ed Smith

06/21/2014

03:49 AM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
Jonathan, nothing special only setup kernel config (attached).
I use Yocto Project Daisy toolchain and kernel from g...
Andrey Mozzhuhin

06/20/2014

02:17 PM Software Development: Real time SATA writes
I am having some trouble with a data acquisition system.
Using MDK_2012-08-10
There are two tasks (among others...
Mary Frantz
02:12 PM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
Andrey, Can you share your linux 3.14 port. What did you have to change to get it working? Are you using device tr... Jonathan Cormier
12:57 PM FPGA Development: DSP to FPGA SPI Setup Question
Hello,ALL
I want to test the DspFpgaSpi, but not successfully setup,Could anyone give me some instructions?
Before ...
lijun yang

06/19/2014

09:13 PM FPGA Development: RE: Looking for help about SPI core communicate with DSPFPGAspi
Hello,
Your CORE_GPIO_MODULE and base address (0x66000080) do not match one another. The address should be the CO...
Gregory Gluszek
02:26 PM FPGA Development: RE: Looking for help about SPI core communicate with DSPFPGAspi
Hello.
Ask the same questions about the GPIO
I also try to use the DSP to communicate with FPGA
The follow is the ...
lijun yang
01:09 PM FPGA Development: RE: Looking for help about SPI core communicate with DSPFPGAspi
Hello,
...
Gregory Gluszek
03:27 PM FPGA Development: RE: Help me check out the gpio Setup,It is not work.
Thank you very much,Mike lijun yang
03:11 PM FPGA Development: RE: Help me check out the gpio Setup,It is not work.
The address for the constructor is not correct. The Address is: the CORE offset times 0x80 bytes + 0x66000000.
In...
Michael Williamson
02:58 PM FPGA Development: Help me check out the gpio Setup,It is not work.
Hello.
Ask the same questions about the GPIO
I also try to use the DSP to communicate with FPGA
The follow is the ...
lijun yang
08:54 AM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
Mike, thank you for fast response.
In Linux 3.14 (from Yocto Project) this leads to disabling cpufreq because it c...
Andrey Mozzhuhin
08:29 AM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
In the hardware, the TPS65023 used for the MityDSP-L138 has the following voltages that are defaulted using the hardw... Michael Williamson
07:39 AM Software Development: TPS65023 VDCDC2 and VDCDC3 constraints
Hello,
I use MityDSP-L138F and Linux kernel from git://support.criticallink.com/home/git/linux-davinci.git but wan...
Andrey Mozzhuhin

06/18/2014

12:57 PM Software Development: RE: USB2.0 Host on MityDSP-L138F
When I enabled the dma I got the following errors when i plugged in the flash drive.... Jonathan Cormier
11:07 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
I was able to scp a 12 MB file without any errors Jonathan Cormier
11:05 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Also you can buy the cables prebuilt.
USB mini 5 pin to USB A Female
http://www.amazon.com/USB-Female-Mini-Male...
Jonathan Cormier
10:41 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
How were you experiencing the unstable ethernet? Just transferring a file? Jonathan Cormier
10:36 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
That changed stuff a bit. I now get more messages and the usb-msd driver seems to wake up.
But during initializati...
Hannes Klas
10:12 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Hannes, please let us know if this resolves your issue. We actually fixed this same problem on our MitySOM-335x modul... Bob Duke
09:54 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Got it working.... Jonathan Cormier
09:11 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
I don't think so. Udev primarily loads the driver and gets called once the driver does something. In the boot log you... Hannes Klas
09:03 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Wondering if this is perhaps a udev issue? Michael Williamson
08:58 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Exactly. But the mass storage driver itself gets loaded and then stalls (no /dev/sd* gets created). Hannes Klas
08:23 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Ok I was able to get things to the point where it will atleast detect the insertion of the flash drive by changing th... Jonathan Cormier
01:52 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
I tried changing between PIO and DMA before. That changed nothing about the problem - It enumerates the device and th... Hannes Klas

06/17/2014

02:21 PM FPGA Development: Looking for help about SPI core communicate with DSPFPGAspi
Hello,All
I have followed the instruction posted by Michael Williamson. The spi core on FPGA
--https://support.cr...
lijun yang
11:51 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Heres my bootlog. I'm having a hard time getting the mini usb working at all, in either host or peripheral mode. I ... Jonathan Cormier
10:11 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
There you are.
That's the dmesg right after startup, with the card reader plugged in during startup. I enabled USB...
Hannes Klas
09:40 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
OT: Hannes, can you please double check your email address in your profile, I (admin) am getting bounced email warnin... Tim Iskander
09:27 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Could you post a full boot log? I'd like to compare it with what I'm getting. Also would be nice to see the connect... Jonathan Cormier
04:16 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Hi Bob,
Here's the file.
Thanks
Hannes
Hannes Klas

06/16/2014

10:08 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Hannes,
Can you upload your kernel .config file? We have seen similar problems on our 335x product line that were ...
Bob Duke
07:15 AM Software Development: USB2.0 Host on MityDSP-L138F
Hello everyone,
I'm trying to use the USB2-OTG on the MityDSP-L138F as a USB2 Host to connect a few USB-Mass Stora...
Hannes Klas
 

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