Activity
From 02/16/2015 to 03/17/2015
03/12/2015
- 11:06 AM FPGA Development: RE: FPGA serial programming interface
- We are happy to provide further assistance with this issue, however I will be contacting you directly at your e-mail ...
03/11/2015
- 10:23 AM FPGA Development: RE: FPGA serial programming interface
- Thanks for the information.
We are prototyping a future product and due to pin count restrictions we can't use par... - 10:18 AM FPGA Development: RE: FPGA serial programming interface
- I discussed this with one of our engineers here and it may be possible however they is likely a bit of work required ...
- 08:32 AM FPGA Development: RE: FPGA serial programming interface
- SB,
I apologize.
The M0 and M1 FPGA pins are tied to resistors on the module to GND (M0) and 3.3V (M1) forcing...
03/10/2015
- 05:04 PM FPGA Development: RE: FPGA serial programming interface
- I understand that. However, I would like to configure the FPGA in serial slave mode.
- 05:01 PM FPGA Development: RE: FPGA serial programming interface
- SB,
The FPGA is configured using 8 bit parallel slave select mode via the EMIFA bus connection to the Omap L138 pr... - hi,
are the pins CCLK, DIN and the MODE pins available on the OMAP-138 as GPIOs, or are they open/hardcoded on the...
03/05/2015
- 05:20 PM Software Development: RE: Write to SharedMem from DSP and read it from ARM
- Thanks for the cache info. Completely missed that part.
I reverted to the original code, and I've added BCACHE_wb(...
02/19/2015
- 10:48 AM Software Development: RE: MDK_2012-08-10 default configuration
- There also may be a small time penalty in having the kernel search for the phy. But this would need to be quantified ...
- 10:46 AM Software Development: RE: MDK_2012-08-10 default configuration
- I believe the phy address was set in an earlier version of the kernel and it was carried forward. There is also the ...
- 09:52 AM Software Development: RE: MDK_2012-08-10 default configuration
- Thanks Mike for answer.
I did not look at section 2.2 of TLK100PHP datasheet. It is my fault.
I read section "3... - 09:18 AM Software Development: RE: MDK_2012-08-10 default configuration
- Hi François,
In the datasheet for the TLK100PHP, Section 2.2 shows that the PHYAD0 pin has an internal pull-up, wh... - 07:33 AM Software Development: RE: MDK_2012-08-10 default configuration
- I look at U-boot code and it doesn't explain what we are seeing.
When resetting the PHY device, only GPIO5[15] is ...
02/18/2015
- 04:59 PM Software Development: RE: MDK_2012-08-10 default configuration
- Thanks Jonathan to told me that I am not alone with that questioning.
The first revision of our custom board had a... - 04:43 PM Software Development: RE: MDK_2012-08-10 default configuration
- François,
I too was confused about this but was unable to determine why the phy id becomes 0x03.
I checked th... - 04:21 PM Software Development: RE: MDK_2012-08-10 default configuration
- Mike,
My reply is out of date but it is about that topic: PHY address configuration.
You said that PHY address ... - 03:59 PM Software Development: RE: Write to SharedMem from DSP and read it from ARM
- Pretty sure you have to flush the DSP cache after changing values.
- 03:48 PM Software Development: RE: Write to SharedMem from DSP and read it from ARM
- Hi,
I am trying to get the shared memory working as well (by writing from DSP side and reading back from ARM side)...
02/17/2015
- 11:41 AM Software Development: RE: Alter Ethernet MAC
- Thanks Jonathan, that's exactly what I was after.
- 11:41 AM Software Development: RE: Alter Ethernet MAC
- You might also try this technique, though I am not sure if the current version of the 3.2 kernel has this command lin...
- 11:26 AM Software Development: RE: Alter Ethernet MAC
- Mostafa,
We store the mac address on a eeprom on the SoM. The settings stored on this can be accessed using the f... - Hi, is it possible to alter the 'burned-in' MAC address of an L138F? I know that I can change it using 'ifconfig eth0...
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