Activity
From 06/16/2016 to 07/15/2016
07/12/2016
- 09:02 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Excellent glad you got it working.
- 12:16 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Johnathan,
Joy Joy, Happy Happy.
Everything is working. There were three items altogether. First was the "open...
07/11/2016
- 05:06 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- I looked deeper into the error we were provoking on our bench; it turned out to be a c++ vector de-referencing error ...
07/09/2016
- 06:24 PM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Ian St. John wrote:
> Can you confirm that the signal marked as 'reserved' just beside the SPI1_CSC1 is the SPI1_CSC... - 05:56 PM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Hmm. I asked the EE about the diagram and he was interested in the fact that there was a pull up on the CS line. Appa...
- 12:40 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- The eeprom is on the i2c0 bus. I'm assuming you are talking about the SPI Nor flash which is on SPI1_CS0.+
Oops... - 01:23 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- Hi Fred,
Syslink is newer than DSPlink, though in the context of the L138 it's very similar code (syslink evolved ... - 12:11 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- The error collected above was on the bench after making some minor software changes seemingly unrelated with the code...
- 11:23 AM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- I found the following on the TI site; looks like they struggled with this issue with sys-link... I'm not sure how sys...
07/08/2016
- I think there may be a bug in the dsplink kernel code that causes the scheduler to run after a call to spinlock. "rem...
- 09:33 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Ian St. John wrote:
> I am building and programming a custom board without Linux. Basic embedded drivers running fro...
07/05/2016
- I am building and programming a custom board without Linux. Basic embedded drivers running from SPI1,CS0 (8MB NOR Fla...
06/22/2016
- 04:13 AM Software Development: RE: kernel 3.2 - tcpip stack latency
- Hi Greg,
Than you for your feedback.
Indeed, flag CONFIG_PREEMPT is set in kernel config. As far as we can see...
06/21/2016
- 01:30 PM Software Development: RE: kernel 3.2 - tcpip stack latency
- Hi Patrice,
Since you are using SCHED_RR I am assuming you are using CONFIG_PREEMPT in your kernel config, correc... - Hello,
We've built an application receiving messages from two devices at a rate of 1 message of 1440 bytes every 1...
06/17/2016
- 08:25 AM Software Development: RE: Flashing a new kernel to NOR from Linux rather than u-boot
- Here are the results from my board/MDK:...
06/16/2016
- 05:43 PM Software Development: RE: Flashing a new kernel to NOR from Linux rather than u-boot
- Alternatively it may be possible for you to build the kernel features as modules and insert them in the live system. ...
- 05:39 PM Software Development: RE: Flashing a new kernel to NOR from Linux rather than u-boot
- Fred,
Do you have /dev/mtdblock* devices? My kernel boot args have this "root=/dev/mtdblock0", so my assumption i... - We use opkg to push updates to our products that are installed in the field. We now need a way to update the kernel, ...
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