Activity
From 09/28/2014 to 10/27/2014
10/20/2014
- 04:34 PM FPGA Development: RE: Modular SGDMA
- Hi Dan,
I polling the FIFO empty signal for the both the dispatcher and write master to ensure that only when both...
10/17/2014
- 04:53 PM FPGA Development: RE: Modular SGDMA
- Hi Jack,
You could try polling the dispatcher's busy bit instead but I'm not quite sure if that would solve your i... - Hi
I'm running into a difficulty with the Modular SGDMA that is used in the HPS Memory example.
I have to send ...
10/02/2014
- 12:53 PM FPGA Development: RE: HPS Memory Controller
- Hi,
Just raising this subject again. I'm going through the document for the sgdma_dispatcher, but do you guys have...
10/01/2014
- 02:27 PM Software Development: RE: Port 22222
- Actually, the issue seems to be with the third party software.
So don't worry about it. - 02:07 PM Software Development: RE: Port 22222
- Furthermore, ssh works to it.
We have a python program that tries to connect to the board via port 22222, but it r... - 01:58 PM Software Development: RE: Port 22222
- Hi Bob,
The only file I changed is the interface file in the /etc/network folder to give the system a static addre... - 01:44 PM Software Development: RE: Port 22222
- Jack, I'm assuming you are running the "third party software" on the PC, correct?
If so, how did you configure t... - Hi,
We are trying to have a third party software to connect to the board via Port 22222. We assigned a static addr...
09/30/2014
- 12:41 PM Software Development: RE: Static IP Adderess
- Hi Dan,
That works! Thank you!
Jack - 09:26 AM Software Development: RE: Static IP Adderess
- Hello Jack,
Is your PC a windows machine? If so I believe if you have the firewall on then it will block any ping ...
09/29/2014
- Hi,
I tried to set a static IP address to the system, by changing the /etc/network/interface file (See below). Bec...
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