Activity

From 10/22/2025 to 11/20/2025

08:59 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
Okay that makes sense! In that case, I would look into Arm Developer Studio then. You should be able to obta... Mike Fiorenza
08:50 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Mike,
Thank you for your response, I’ll have a look at it.
I was focusing on using JTAG because I’m having an issue... Atef DORAI
04:03 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
If you see our Wiki page here: https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki we post fu... Mike Fiorenza
03:50 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Mike, Thanks for your response. Yes, I was trying to load the compiled C code binary directly to the HPS via JTAG. Si... Atef DORAI
03:42 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
Glad to hear you resolved your JTAG issue. Can you elaborate on how you are trying to load the HPS portion? ... Mike Fiorenza
10:31 AM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Thank you Mike, the system works by reversing the USB Blaster connection. I have another question please: Do you have... Atef DORAI

04:23 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
From your picture, it looks like you have the JTAG pod plugged in backwards. Pin 1 on your ribbon cable does... Mike Fiorenza
04:13 PM FPGA Development: JTAG programming issue on MitySOM-5CSX DevKit with Quartus (Windows 11): Hello,
I’m trying to program a MitySOM-5CSX board via JTAG using Quartus on Windows 11, but I encounter an error im... Atef DORAI

05:25 PM FPGA Development: RE: Building the MitySOM-5CSX: Hi John,
Hope you are well. I'll go ahead and try and answer your questions and comments below!
* @Is there a s... Seth Graber

01:13 AM FPGA Development: RE: Building the MitySOM-5CSX: In the above, I don't know where the strike-thru lines came from. John Iannuzzi
01:12 AM FPGA Development: RE: Building the MitySOM-5CSX: Additionally, in comparing the provided sd card with the built one, I found that the directory, *scripts_auto* , doe... John Iannuzzi

02:47 AM FPGA Development: RE: Building the MitySOM-5CSX: This past weekend I was experimenting with the provided sd card and the examples. Specifically the LED example to li... John Iannuzzi

12:37 AM FPGA Development: RE: Building the MitySOM-5CSX: Hi Seth,
For the 1st bullet point above I followed your instructions using the *command line* and it worked. Great!... John Iannuzzi

07:51 PM FPGA Development: RE: Building the MitySOM-5CSX: Hi John,
Thank you for the additional details. *dd* typically will take a moment to return the prompt, it does on ... Seth Graber
07:20 PM FPGA Development: RE: Building the MitySOM-5CSX: Hi Seth,
All I did was extract the image and dd it right to the sd card. I will read in more detail your comments w... John Iannuzzi
03:09 PM FPGA Development: RE: Building the MitySOM-5CSX: Hi John,
Thank you for providing the 3 boot outputs. I've gone ahead and taken a look and I'll make some comments ... Seth Graber
03:19 AM FPGA Development: RE: Building the MitySOM-5CSX: Ok, so I downloaded the sd card from the website as instructed, and loaded it onto a fresh card.
I now have 3 _dif... John Iannuzzi

01:46 PM FPGA Development: RE: Building the MitySOM-5CSX: John,
Taking a look at your output it appears like you successfully recompiled the SPL and UBOOT. The differences ... Mike Fiorenza
02:19 AM FPGA Development: RE: Building the MitySOM-5CSX: Hi, so I was able to make uboot and an sd card image. I took the image and loaded it to a blank sd card and powered ... John Iannuzzi

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Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V