Activity
From 12/25/2013 to 01/23/2014
01/23/2014
- MC 06:18 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
- Hello Mike,
I've solved the problem! Actually it was a timing problem related to the access policy to the emif.
I eliminated the one-clock-delay due to the output flip-flop (reg_read), substituting it with a multiplexer.
Now it wor... - Hi Sir,
This is regarding editing the kernel in NOR flash memory, a detailed steps have been given in wiki for editing kernel but how to interface Mitydsp to host PC while flashing. Please help me in this regard.
Thanks in advance,...
01/22/2014
- AD 03:37 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Your MSEL is currently 00000. Try changing S100-position3 to OFF to get an MSEL[4:0] of 00100. This will change the power-on reset delay to Standard instead of Fast.
To read the switch settings, note the white labels in silkscreen on... - DV 03:11 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Looking through the uboot source code it seems that the HPS is not able to set the FPGA into a reset mode. Which could possibly be a hardware issue. One last test is if you have an HSMC board connected, unplug it and try to load the FPGA...
-
02:57 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- correct
- DV 02:56 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Is the following the full error you received?
-
02:34 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Yes
- DV 02:33 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- was this from the **run fpgaload**?
-
02:31 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Hi Dan,
I got an error: Failed with error code -1.
Jack - DV 02:29 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Hi Jack,
This needs to be run during uboot, which you get to by pressing any key during the first 5 seconds of start up. If you are able to load it through uboot then that should factor out a hardware issue.
Dan -
02:13 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Hi Dan,
The Linux OS on the board doesn't have run and saveenv. I tried to update it, but it doesn't have the apt-get command either.
Cheers,
Jack - DV 01:33 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
-
12:59 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Hi Dan,
Regarding the uboot procedure, I have never worked with uboot before and the instructions on rocketboard is not very specific as to how to set it up. Could you provide some help on this please?
Thanks again for all your hel... -
12:33 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Hi Adam,
I'm not sure what the default positions for the MSEL or which of the switches on board are for the MSEL. So here's a picture.
Thanks,
Jack - AD 12:23 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Hi Jack,
Please check the MSEL dip switches. These should be set to FPPx16 or FPPx32 for the FPGA Manager to be able to load the FPGA. Those pins are read at power-on. MSEL details can be found in:
Table 7-2 of:
http://www.alte... -
12:07 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Hi Dan,
The same issue still occurs after power cycling.
I'm wondering if it's a hardware issue.
Jack - DV 10:43 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Hi Jack,
We have not seen this issue yet. If you power cycle the board did this issue still occur?
Dan - MC 09:19 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
- Dear Mike,
When you say to configure the emif wait states etc., you mean modifying, for example, the file "u-boot-mitydspl138/board/davinci/mityomapl138/mityomapl138.c" ?
In that file I see these configurations:
code:
emif_r...
01/21/2014
- EK 04:04 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Error libstdc++.so.6
- To whom this may concern!...
I had a problem with the file system... Using NFS updated the problem is solved... - MW 07:31 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
- I think you should setup a chipscope in the FPGA and watch the EMIFA transactions and see if the data is being posted to the bus per the timing specs. I don't see anything obviously wrong in your ISR code. If you have to hit each regis...
- Dear Sirs,
I have implemented a ping pong buffer to transfer via EMIF some data from a Block-RAM on FPGA to a shared memory between ARM and DSP allocated by CMEM.
RAM is filled with 16 bit samples coming from an ADC: I have "hacked" yo...
01/20/2014
- Hello Mike,
In the vision_framework example given by you it is clear that the tcAlgorithmEdgeDetect::Process() class makes use of the IMG_sobel_3x3_16() library routine to perform a basic edge detection transform.
But in order to c... -
05:19 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: Load FPGA Timeout Error
- Hi,
I just got back from vacation and tried to run my board and ran into a problem.
I tried to load rbf file as usual and it returns this
altera_fpga_manager ff706000.fpgamgr: timeout
Thanks!
Jack - NK 05:27 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
- Hello Mike,
In the vision_framework example given by you it is clear that the tcAlgorithmEdgeDetect::Process() class makes use of the IMG_sobel_3x3_16() library routine to perform a basic edge detection transform.
But in order to c...
01/17/2014
- *Hello Dears,
Following steps on "DSP Hello World", it seems I have outputs of ARM "HelloWorldDSP.out" and DSP "HelloWorld"... but in execution, I encounter to such the error message:*
_root@mityomapl138:~# ./HelloWorld HelloWorldDSP...
01/16/2014
- Dear sir,
Thanks for your prompt response for our posts
We are looking to program ARM9 processor core (OMAPL138) of MitydspL138F. We have seen in MitydspL138F VDK that two UART's are available but we are not pretty sure which is va... - JJ 04:45 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: WL1271 Calibration tool
- Thanks for the information. Just to be clear, I am not having trouble using wireless on the evaluation board. I am only having trouble running the wifi calibration tool.
My understanding is that the wifi calibration tool needs to be ... - GD 01:39 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: WL1271 Calibration tool
- Hello Jesse,
We attempted to run the calibration tools as well, and have seen the same result as you. We are looking into the problem, but would like to point out that the wireless should work on the board out of box. The way to confi... - JC 10:44 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: 3.1 vs 3.2 Kernel MityARM-335x Dev Kit HDMI not working consistently
- Environment variable can be setup like:
- JC 10:42 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: 3.1 vs 3.2 Kernel MityARM-335x Dev Kit HDMI not working consistently
- This is normal. As far as I'm aware the 3.1 kernel was never updated to initiate the HDMI chip and relied on u-boot as well.
http://support.criticallink.com/redmine/projects/armc8-platforms/wiki/Das_U-Boot_Port#Environment-Settings-f...
01/15/2014
- NK 10:52 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "JTAG Interface on MitydspL138F kit"
- Dear sir,
Thank you for your reply, it helped us a lot.
with regards,
Naveen K.S - NK 10:49 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Regarding handling UART of MitydspL138 F
- Dear sir,
Kindly reply at the earliest to the above post, it will be very helpful to us.
with regards,
Naveen K.S.
01/13/2014
- DP 07:56 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Still requires ifdown eth0 / ifup eth0 (DHCP)
- adding a bit more information:
seems that I'm not getting dbus.service or avahi-daemon.service starting automatically. systemctl reports:
avahi-daemon.service loaded inactive dead Avahi mDNS/DNS-SD Stack
... - DP 05:59 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Still requires ifdown eth0 / ifup eth0 (DHCP)
- Sorry - files formated above, enclosed below
--Daniel - DP 05:58 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Still requires ifdown eth0 / ifup eth0 (DHCP)
- I believe that I'm using the 'released' version of hte file system (MDK).
root@mityT1-dev:/lib/systemd/system# more networking.service
[Unit]
Description=Networking
Before=getty@tty1.service display-manager.service app.servic... - BD 05:41 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Still requires ifdown eth0 / ifup eth0 (DHCP)
- Hello Dan,
Are you using a custom filesystem or an example filesystem from our MDK? Are you running with the MityDSP-L138 module in our development board or from your own baseboard?
Could you post the contents of your networking.se... - I'm still having trouble with the dns services. I've narrowed it down to two items:
1). at boot I still need to log into the machine and run ifdown eth0; ifup eth0
2). or sometime a restart of the avahi-daemon.services (syst... - JJ 04:22 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: WL1271 Calibration tool
- Jonathon,
You're correct, I was using the commands from the wrong section. Unfortunately, following the correct commands leads to a similar result:
root@am335x-evm:~# calibrator set ref_nvs /usr/share/ti/wifi-utils/ini_files/1... - JC 03:09 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: WL1271 Calibration tool
- Have you tried running the commands from this section: http://processors.wiki.ti.com/index.php/WL12xx_NLCP_Calibration_Process#Calibration_for_R4_SP1_and_earlier_.28AM-SDK-05.03.00.01.29
Since your using a kernel based from the 04.06.... - JJ 02:38 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: WL1271 Calibration tool
- Just to be clear, there is a lot of additional output when I try to run the calibrator command. I can post it all if it would be helpful.
- I'm trying to run the WL1271 calibration tool and generate an NVS file and I am running into some problems.
Setup -
Hardware : MityARM-335x Development Kit
Bootloader : built from AM335XPSP_04.06.00.08 branch on git://support.criti...
01/10/2014
- This is being posted on behalf of a customer.
- AB 10:15 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "JTAG Interface on MitydspL138F kit"
- Naveen,
The Critical Link debug adapter is included with the Vision Development Kit.
The following datasheet describes the included debug adapter: http://www.mitydsp.com/images/upload/File/80-000286_Debug_Adapter.pdf
The rest o... - NK 01:30 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "JTAG Interface on MitydspL138F kit"
- Hello sir,
Kindly reply to my query as soon as possible.
with regards,
Naveen K.S - MW 09:15 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: Ground Pins
- It's usually a good idea to hook up all of the ground pins as the specification calls for. For higher speed signal interfacing (FPGA pins, clocks, USB signals, etc.), the ground pins provide return current paths and reduce the potential...
- Hej hej,
the MityDSP L138F/L138 has quite a lot of ground pins.
Is it necessary to connect all to ground or are they bridged on the Mitydsp-board? Which pins must be connected to ground and which can be left unconnected on my baseb... - NK 02:26 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Regarding handling UART of MitydspL138 F
- Dear sir,
We are looking to program ARM9 processor core (OMAPL138) of MitydspL138F. We have seen in MitydspL138F VDK that two UART's are available but we are not pretty sure which is vailable in VDK linux kernel image.
But our appl...
01/09/2014
- NK 10:30 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
- Hello Mike,
Thanks for your reply..
with regards,
Naveen K.S - MW 08:59 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
- You can use the C64X+ IMGLIB with the OMAP-L138. The 674x core is a superset of c67x+ and c64x+ instruction sets.
-Mike
- ND 08:50 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: I/O voltage
- Thanks, very useful info. Will give it a try over the next couple of weeks.
Nigel.
01/08/2014
- Hello sir,
In our development phase we are getting MitydspL138F Vision development kit, we are quite unsure with the JTAG interface. It was given in the VDK data sheet that to use XDS510 USB JTAG Emulator(14 pin) for dsp and FPGA JTAG... - PS 11:24 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Thank You Jonathan.
I will try them out. - NK 11:06 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
- Hello Mike,
Thanks for your reply, actually i understood that in your vision_framework you have used C64X IMGLIB libraries from the link provided. But my doubt is whether can we use latest C64X+ IMGLIB (which has enhancements from its... - MW 07:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
- The C64X IMGLIB libraries from TI can be used by simply linking the library provided by TI to your application and calling the routines as needed.
The IMGLIB comes with a users manual and API reference guide from TI.
In the "vision... - Hello sir,
I am working on OMAPL138F for one of my image processing application, kindly let me know if i can use C64x+ IMGLIB functions (as i need to process 16 bit data) for my application development.If not let me know which versio... - AD 04:57 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: I/O voltage
- Hi Nigel,
Below you will find the details to support additional IO standards. I believe this covers all the necessary details...
h2. MityARM-5CSX VIO Support
h3. VCCPD Power and Support for +3.0 or +3.3V Standards
The I/O ba... - ND 01:53 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: I/O voltage
- Any update on whether the dev kit can be configured for 3.3v I/O?
Thanks,
Nigel.
01/07/2014
- ŁD 07:18 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Broken i_ema_a<8>
- ChipScope confirmed that sth is wrong with i_ema_a<8> pin.
Serial numbers of Mity modules: 121924 (broken), 131576 (working).
Lukasz - ŁD 08:11 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Broken i_ema_a<8>
- I'll send them tomorrow.
Lukasz - MW 07:59 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Broken i_ema_a<8>
- Yes. Two different mity boards. Can you give me the serial numbers?
-Mike
- ŁD 07:57 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Broken i_ema_a<8>
- Hello Mike,
1. What do you mean by two separate modules, two mity boards?
2. Yes, Same kernel, same application, same FPGA image.
3. Two diffrent host boards, but I don't think that host board can be a problem,
because no EMIF signal... - MW 07:18 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Broken i_ema_a<8>
- Hello Mr. Dalek,
It might be a problem. Between your "good and bad" boards:
- You are referring to 2 separate modules? Can you provide the serial numbers of the modules?
- You are running the same software image (same kernel, sa... - Hello,
My FPGA has a little problem with modules detection,
Linux driver and controlling program always double-detect them.
So I've tested address lines with this simple VHDL file:
@
o_nmi_n <= '1';
o_int <= (others => '0');
io_... - JC 10:51 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- The connection setup can be treated like any normal network connection.
You can use ssh to transfer files to and from the board. Or you can setup an nfs mount.
For transferring real-time data, you will likely have to create a cust... - PS 09:15 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Hello Jonathan, Mike
Thank you for your replies.
I have been able to find the usb0 device after executing the ifconfig -a command. I carried out the steps as given in the RNDIS wiki page. However, the PC failed to get an IP address...
01/06/2014
- MW 09:06 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- When you plug the USB in, the kernel should also dump out some information about the connection.
Attaching the results of dmesg might help as well.
-Mike
- JC 08:53 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- On the L138, if you run ifconfig -a is a usb0 listed?
-Jonathan - PS 08:41 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Hello Mike,
As per your suggestion, I have made the changes to the kernel configuration and I have also followed the instructions given in the wiki page.
I have chosen the RNDIS device and compiled it into the kernel. The port is in ...
01/02/2014
- MW 08:14 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Regarding handling UART of MitydspL138 F
- Which UART are you after? Which processor core would you like to use with it?
- Dear sir,
It is given in MitydspL138F VDK datasheet that already UART driver is available in Kernel image. Can you provide more details regarding it as we wanted to use UART in interrupt mode.
with regards,
Naveen K.S. - MW 08:12 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Hello,
It looks like you have selected the "gadget zero" device as your peripheral device. This is a USB test device setup.
You need to go back to your kernel configuration deselect the gadget zero device and select the RNDIS devi...
12/31/2013
- Hello,
I am using a MityDSP L138F with a custom board. This board has provision for a USB 1.1 Host and an USB 2 OTG port. I am trying to configure the USB-OTG port as a peripheral and get it detected through a Windows as well as a Linux...