Activity
From 02/14/2014 to 03/15/2014
03/11/2014
- 05:13 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Hello Mike,
Thank you very much for your response.
I have a question before I transfer to other place than L2 Cac... - 01:01 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- If you would like to use the latest sd card image. Instructions can be found here: https://support.criticallink.com/r...
- 12:58 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- Excellent glad the guide helped.
Just so you know we updated the u-boot branch with timings for the DDR to run a... - 12:22 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- Successful boot of kernel 3.2 console messages. U-boot has been modified with new mii pin locations, so the kernel do...
- 12:14 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- Building the Kernel with your new instruction, version: mityarm v3.2, is booting correctly. I am using gcc-linaro-arm...
- 11:15 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- There shouldn't be any problem building the kernel with the SDK 06 version. Though I have not personally tested buil...
- 11:08 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- There aren't any changes in your .config file from the one in our AM335XPSP_04.06.00.02 branch.
- 11:06 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- Have you modified the kernel? If so were you able to boot using the unmodified version?
- 10:58 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting Linux
- I have attached the .config file.
- I am trying to build the Kernel. After loading the Linux uImage file, I get the message:
"Uncompressing Linux... don...
03/10/2014
- 07:25 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Do you see this affect if you transfer to a different place in DDR (instead of the L2 SRAM)?
Are you still enabl... - 07:19 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Hello Michael,
It looks like edma is causing that. When I turned the edma off and used the data without transferring...
03/09/2014
- 03:44 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- It sort of sounds like there is a memory leak somewhere. Are you thinking it's in the DspQDMA routines?
-Mike - 03:29 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Hello again,
There is another symptom in my application that occurs. I am viewing the size of heap in the MEM in the...
03/07/2014
- 09:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Breaking into" uboot
- Hello,
Thank you very much for your replies. I tried a different cable and it worked.
I attempted to update Linu... - 09:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Breaking into" uboot
- Hello Jordi,
Can you confirm that the serial cable provided with the dev kit has the words "Null Modem" printed on... - 08:14 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Breaking into" uboot
- Also to ask the simple questions, have you tried with and without the null modem? I've run into serial cables that al...
- 08:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Breaking into" uboot
- ...
- 08:07 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Breaking into" uboot
- You should see printout similar to this:...
- Hello, I have a MityDSP L138 and I am trying to gain access to u-boot. I have a NULL modem serial cable which was sup...
03/05/2014
- 05:24 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Reading memory into a file
- Hi Jack,
It may take us some time to get to the bottom of this. We'll post in this thread as soon as we have addi... - 12:51 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Reading memory into a file
- Any update on this??
- Hi,
I'm currently using the Mity-DSP pro and in my application the FPGA receive LVDS signals as inputs. The MityDS...
03/04/2014
- 09:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to add ifplugd to Busybox
-
> When you remove and reconnect the ethernet cable do you get any messages printed on the console?
>
No mes...
03/03/2014
- 05:59 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Reading memory into a file
- Hi Greg,
I have no problem with the software wihtout first sending the command to enable the SDRAM. The data that ... - 05:56 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Reading memory into a file
- Hi Jack,
Do you run into any problems if you use your software without first sending the command to enable the SD... - 03:45 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Reading memory into a file
- Hi,
I managed to read memory into a file but we got another problem.
We are following your example - write to h... - 01:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to add ifplugd to Busybox
- Mary,
Based upon a quick review, your method looks OK.
When you remove and reconnect the ethernet cable do you... - 09:46 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to add ifplugd to Busybox
- Sorry,... I hit enter before I was done above. Attached are the other script files
To build busybox, I first ran ... - 09:29 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to add ifplugd to Busybox
- I have done the following:...
- 09:28 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- Thank you for your comments.
The glitches you can see on the waveforms occur when there is an acknowledge bit. The...
03/02/2014
- 03:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Hello,
Thank you for response. It is highly possible that the DMA transfer is triggered before the previous has not ...
02/28/2014
- 11:01 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to add ifplugd to Busybox
- Mary,
In regards to question (2) either approach should work. If you want to replace busy box you will need to do... - I want to add ifplugd to Busybox so that the system can detect ethernet cable plug/unplug events and reinitialize the...
02/27/2014
- 02:40 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Reading memory into a file
- Jack,
We don't have any general examples to provide.
If you're trying to share data over FTP or ssh in a human... - Hi,
Do you have any examples on reading memory in software?
We need to grab the data we have in memory into a f... - 07:42 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- I don't like the glitches in your "noramal operation" or "early termination" scope plots. Those should not be there....
- 05:21 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- Any comments on the waveforms I posted?
Ed Smith
02/26/2014
- 09:35 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138F SoM initial flash configuration
- Francois,
Every module is run through our test fixture which programs the bootloader into NOR before running its t... - Hi,
When a customer order MityDSP-L138F SoM from either your offcial distributors or directly from Critical Link, ...
02/25/2014
- 07:34 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- Thanks for the swift response. That is exactly the info I've been looking for.
I have attached some waveforms. The... - 06:59 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- The PMIC is TPS65023RSBT. The PROM is 24AA02-I/MS. Pins 1, 2, and 3, of the PROM are no-connects.
The I2C0_SCL a... - 06:24 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- I'm working with Bruce on this issue. It would be really helpful to have the part numbers of the other devices, parti...
- 07:02 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Is the first DMA completing before calling the second?
- 05:04 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Hello again,
It appears that now the different problem occurs. When the DMA transmission is invoked twice or thrice,...
02/24/2014
- 07:38 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Excellent! Glad it is now working!
Dave
- 07:15 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
- Hello David,
Sorry for the latency-I corrected the code due to your suggestions and it worked- thank you.
Best Regards
02/23/2014
- Hej hej,
I would like to change the EMIF-Clock from 100 MHz to 25 MHz for a MityDSP L138-Module. I searched the u-...
02/22/2014
- 07:48 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Yocto Plug-In Python.exe Error
- Can you post a capture of your complete shell interaction?
02/20/2014
- 04:20 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Excellent this is a known issue. On boot the filesystem will try to calibrate the touch screen if its calibration fi...
- 03:27 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Hello again,
Thank you for your help so far; I have been making progress, but still stuck on the NAND boot. After ... - 02:39 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Nope, if you connect it to the HPS to FPGA bridge you can treat it more like a register that the code on the HPS read...
- 01:10 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Hi Dan,
Don't you mean connect it to the FPGA to HPS AXI bridge?
Our input data is processed in the FPGA.
Th... - 01:03 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- At that rate it might be simpler to create a FIFO in the FPGA and connect it to the light weight HPS to FPGA bridge. ...
02/19/2014
- 05:33 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Also, I'm trying to by pass the SGDMA dispatcher and use the write master directly.
Jack - 05:32 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Hi Dan,
Our data is coming in at about 40 MHz,
Jack - 04:57 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Hi Jack,
Looking in the SGDMA dispatcher core user guide, it appears that if you use the extended descriptors you ... - 04:33 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Hi Dan,
Regarding the SGDMA Write Master Core. I looked through the document for this core and it doesn't give any... - 03:40 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Jack,
We do not currently have an example that uses a non-packetized Avalon stream. There should be an option in t... - 03:22 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Hi,
Do you have any write to HPS memory examples where I can send data into the memory in a continuous stream rath... - 08:15 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- We leave it at 300 Mhz
- 08:08 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- When you boot linux, are you changing the CPU OPP to 456 MHz or leaving it at 300 MHz?
- 08:03 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Yes we have adjusted the bus master priority of uPP, but did not see any great improvements (strangely).
... - 07:42 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Did you check / adjust your UPP Bus master priorities?
- 07:33 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Just a quick update. When we do not boot into linux (just uboot) we do not see
these errors.
So booting...
02/18/2014
- 08:50 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
Here are a couple of other things to consider:
# In the past we've had throughput problems with TI's ... - 08:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- You might raise the priority up a bit (try 0 or 1). If the transfers are small, then it should be OK to give it prio...
- 08:04 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Here are some answers to the questions:
* Are you trying to run continuous transfers?
- We do not r... - 07:17 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
Are you trying to run continuous transfers?
At 75 Mhz, you should be running a buffer rep rate of 64 /... - 02:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Here are some answers to the questions:
* Are you using the Critical Link MDK drivers? If so, what versi... - 07:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- Hi Bruce,
I believe that the I2C addresses for I2C0 are described in the "Carrier Board Design Guide":http://www.c... - We are currently investigating a problem accessing the I2C0 bus.
My initial enquiry is to find out what devices ...
02/17/2014
- 09:25 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
If you are following the uPP design guidelines, then perhaps this is a true underflow or overflow condit... - Hello,
We use the MityDSP-L138F and between DSP and FPGA we use UPP communication but transmit (channel A) is givi...
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