Activity

From 12/04/2017 to 01/02/2018

OÇ 09:57 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Changing UART1 to UART2 in Linux Kernel: Just noticed I left the @bootargs@ as @ttyS1@.
Changing that to @ttyS2@ solved that issue.
Sorry, I wasn't expecting such a simple solution. Okan Çalış
OÇ 05:32 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: Changing UART1 to UART2 in Linux Kernel: Hi,
We've been working on a MityDsp-L138F board, and I can boot to Linux with NFS, with the following environment variables: Okan Çalış

VP 11:56 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: Low frequency input (5 Hz to 20KHz processing) for mitydspl138F: Hi,
I have a custom board with
1) MityDspl-138F module (with FPGA)
2) No Ethernet port
3) UART,USB,SD CARD interface
4) We are using ADC5560 and DAC5672, reference is taken from Analog Expansion Board.
ADC and DAC both operat... Vivek Ponnani
VJ 08:55 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: FPGA GPIO interrupt: Hi Dan
I have attached the kernel module we are trying to load, fpga_uinput.ko and the Makefile.
One thing we have not figured out is how the fpga gpio interrupts are mapped into the linux interrupts.
To make this work (on our previou... V J

DV 01:14 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: FPGA GPIO interrupt: Hi Vidar,
Can you please post your updated dts and the source for the gpio driver?
Dan Daniel Vincelette
VJ 12:32 PM MitySOM-5CSX Altera Cyclone V Software Development: FPGA GPIO interrupt: Hello
In our design we need to generate a gpio interrupt in the fpga, catch it on the Linux side and execute various SW- actions.
We have a working ‘fpga gpio interrupt kernel module’ developed for another board, and we want to port i... V J
VJ 12:56 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board: Hi
Checking out the altera 4.1.22-ltsi-rt branch from git://github.com/altera-opensource/linux-socfpga, and compiling the kernel with gcc version 4.8.3 solved the problems.
Thanks!
BR
Vidar
V J

DV 03:22 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: How to generate the device tree files: Hi Vidar,
The recommended procedure is to copy our development kit dts and alter it for your needs:https://support.criticallink.com/gitweb/?p=linux-socfpga.git;a=blob;f=arch/arm/boot/dts/socfpga_mitysom5csx_devkit.dts;h=6fa36cbad203e2... Daniel Vincelette
VJ 02:58 PM MitySOM-5CSX Altera Cyclone V Software Development: How to generate the device tree files: Hi
In our design we have added a msgdma, some pios and irqs, and we need an updated dts file.
I am not able to find any board related xml files for the MitySOM 5CSX eval board, so using the sopc2dts tool to auto generate the dts file... V J
DV 01:51 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board: Hi Vidar,
You might need to checkout the altera 4.1.22-rt instead of trying to use the source that yocto downloads as your kernel source directory. If you would like yocto to build your out of tree module then this link should help: h... Daniel Vincelette
VJ 12:54 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board: Hello Dan,
Thanks for the update. I have built the krogoth branch, and have now a running system!
The next step is to compile my gpio interrupt kernel module, and I have some problems.
From my previous Terasic project I have a work... V J

DV 01:35 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board: Adding poky_checkout.sh, I missed it in my past post.
My apologizes,
Dan Daniel Vincelette

DV 11:31 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board: Hello,
I would recommend using our newer krogoth branch in order to build the the 4.1.22-ltsi-rt kernel. I've been able to use it in conjunction with altera's meta layer to build the the rt kernel.
I have attached a few files that ... Daniel Vincelette

JC 11:13 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Core Creation Guidelines: Jorden Luke wrote:
> I am trying to get some help with this one as well. Is there are up date to this one?
It doesn't look like we ever created that guide. I'd recommend looking at the provided source files as examples.
examples/... Jonathan Cormier
JL 06:52 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Core Creation Guidelines: I am trying to get some help with this one as well. Is there are up date to this one? Jorden Luke

JC 05:01 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Loading kernel to SPI flash and Root file system .jffs2 to NAND.: Vivek Ponnani wrote:
> My queries are as below
> ...
Looks fine.
>
> ...
You'd want to extract the MDK filesystem, update the files and then generate the jffs2 image file. NOTE: We also generate a new tarball which we can archive o... Jonathan Cormier
VP 02:24 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Loading kernel to SPI flash and Root file system .jffs2 to NAND.: Hi,
I have a custom board with
1) MityDspl-138F module (with FPGA)
2) No Ethernet port
3) UART,USB,SD CARD interface
we have done following steps till date.
1) I have built VM with MityDSP Critical_Link_Unified_VM_14-04_04-2... Vivek Ponnani
VJ 01:32 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board: Hi
The company I work for has just started working on the MitySOM 5CSX Development board, and in our system we need to use the preempt-RT version of the kernel.
Currently we have a working project using the Terasic DE0-Nano-SoC eval ... V J

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