Activity
From 05/31/2024 to 06/29/2024
06/29/2024
- BK 04:42 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hi Daniel,
Thank you for providing the information regarding booting. I understand the process to boot the cyclone v board.
I had followed the process which is mentioned in [[https://support.criticallink.com/redmine/projects...
06/28/2024
- TI 03:59 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file
- If you just need to build the kernel and device tree, you can download the kernel from https://git.criticallink.com/gitweb/?p=linux-socfpga.git;a=shortlog;h=refs/heads/socfpga-5.4.23-lts (branch socfpga-5.4.23-lts is what we used for the...
- DV 01:34 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello,
The Altera Cyclone V SoC boot process involves several steps to initialize and start up the system. The Cyclone V SoC integrates an ARM-based Hard Processor System (HPS) with FPGA fabric, and the boot process encompasses both t...
06/27/2024
- FW 09:06 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Changing the timer is probably not in my best interest; my project supports down to 1200 baud with packets up to 256 in length (that's over 2 seconds). I see two possibilities:
# Add RTS/CTS back into the pinmux, disable the 485 confi... - FW 06:12 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Here's the snip:
- JC 05:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Looks like wait_for_xmitr has a 10ms timeout, this might explain why the TXEN is enabled for a constant time. At low baud rates the 10ms timeout would be more of an issue I suspect.
Note in newer kernels, the stop_tx call checks the ... - JC 04:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- What does your pinmux look like for UART2?
- FW 03:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Please see two attached scope traces; the second with a 7 character buffer, the first with a 16 character buffer. I wanted to provide some objective evidence to your comments above... Notice the RTS active time is the same; it is that wa...
- TI 02:31 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- It looks like (in the 3.2 kernel anyway) the only serial port driver that supports the delay_rts_after_send option is the atmel_serial.c, and it uses features of the UART to implement it.
You could implement this in the 8250 driver and ... - FW 01:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Thanks for the ideas; I'm looking into the code cited above now; I don't have any new news there at this time.
However, here is some additional info: when the RTS line drops early, it may be a partial character, or sometimes as many ... - TI 01:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- My suspicion is that the register read in wait_for_xmitr() is "lying" and the UART is actually still serializing the data even though it says the TSR is empty.
My suggestion is to put a delay of 1 char before releasing the GPIO. This co... - JC 08:47 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- Seems like it could work. Good find.
- MB 07:17 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- I did come across this application note from TI: https://www.ti.com/lit/ug/tidubw6/tidubw6.pdf?ts=1719509747706
(if the link is broken in the future to others with this need, the article is titled: "TIDUBW6 - June 2016: TI Designs Autom... - BK 05:36 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hi Daniel,
I had the tested the booting by the link which you have mentioned. It is working but getting an error related to ethernet but the board is booted.
Is any FPGA code mandatory to boot the hps?
Can we boot the hps without ... - BK 08:21 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file
- Hi,
We need to build the project from provided jenkins file, and further we are going to modify or add avalon interface to communicated HPS and PL fabric, so we need to regenerate the device tree and build some software on top of it...
06/26/2024
- DV 06:48 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file
- Hello,
I believe the Jenkins file you are referring to was provided as a reference and contains internal links to repositories at Critical Link. These links will need to be replaced with the repositories you will be hosting. Are you t... - Hi,
we have an Jenkins file, but we are new to Jenkins and i am not able to get URL from the Jenkins file. Help me out to get the that link and can you guide me the usage and Procedure of Jenkins
Thanking you,
Bhardwaj Kotha.
06/25/2024
- JC 09:59 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- The kernel driver code for RS485 support can be found here: https://support.criticallink.com/gitweb/?p=linux-davinci.git;a=blobdiff;f=drivers/tty/serial/8250.c;h=fd19e7d82137f1bcccae36b6cade7878267fc8f9;hp=eeadf1b8e093202234b30c688490da2...
- FW 06:58 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Seems a "paste" didn't work as expected...
SER_RS485_USE_GPIO is the same as 1<<5 - We are having a problem with serial port ttyS2 on our L138 SoM which I believe resides in the Linux driver or the TI serial port support. The port is used as a RS-485 interface running Modbus, which requires using the RTS line to control...
- JP 04:33 PM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- Please note that the wiki page "Memory_Overview":https://support.criticallink.com/redmine/projects/mitysom_am57x/wiki/Memory_Overview does have a link to "Customizing Multicore Applications":https://www.ti.com/lit/an/sprac60/sprac60.pdf ...
- DV 02:01 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board PL fabric ethernet access
- Hello,
If you want to intergate the data inside the FPGA instead of having the HPS involved you could look into using Altera's Triple Speed Ethernet MAC: https://www.intel.com/content/www/us/en/docs/programmable/683402/22-4-21-1-0/exa... - Hi all, I am working on a project where two ethernet interfaces, are connected through PL fabric, using GMII to RGMIIConvertor Core which converts RGMII to SGMII and HPS EMAC Interface Splitter Core. Here the emac signals connected to HP...
06/24/2024
- DV 08:39 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello,
From the error it looks like the SPL isn't able to correctly read the MBR/Partition table on the SD card. This could be due to misconfiguration of the pinmux in your FPGA design. As a sanity check, could you try our Quartus 18.... - BK 08:03 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hi Daniel,
Can you please tell me why this error is coming while booting.
I am facing this issue from last 15 days. Please give some solution ASAP to this error.
Thanks,
Bhardwaj - JB 02:55 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Does yocto support multiple config fragments?
- Hi Nathan,
I just tested multiple config fragments, and everything worked for me. Here is part of the simple config file I tested.
linux-cl-ti_6.1.bbappend:
06/21/2024
- BK 05:25 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello Daniel,
I will wait for your response. I am working on HPS only at present.
Thanks,
Bhardwaj
06/20/2024
- JC 08:06 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Does yocto support multiple config fragments?
- Hi Nathan, the config fragments are handled by a TI recipe located at sources/meta-ti/meta-ti-bsp/recipes-kernel/linux/setup-defconfig.inc
though we copied it to sources/meta-mitysom/recipes-kernel/linux/setup-defconfig.inc incase TI re... - JC 07:57 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- How long are you looking for?
The kernel documentation mentions getting extended distance for rs232 by using UTP cat 5 cable. Or using a shield low-capacitance wire. Also mentions using line drivers to get larger distances.
https://... - MB 03:43 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- Hi Jonathan,
thanks for the quick response. I will look into the 8250 driver, it might be useful (if only for my runtime code). I expected a hesitant response with regard to this scheme, but half duplex RS485 is unfortunately the mos... - DV 03:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello,
We are currently in the process of updating our instructions for building the FPGA, bootloaders, and filesystem with latest major versions provided by Altera. These instructions will be tailored and tested for our SOM, which we... - Dear sir/madam,
I am working on cyclone v 5CSEBA4U2317 SOM with custom board. I am using U-boot -socfpga-socfpga_v2023.10 and linux-socfpga-socfpga-6.1.68-lts files for generating u-boot-with-spl.sfp ,zIm...
06/19/2024
- JC 07:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- The serial 8250 driver has an rs485 mode which we extended to allow using a gpio to generate a RS485 TX enable. However this was intended to be setup at runtime for a separate interface and not for the debug console. Though you may be ...
- Hi all,
My application requires installation embedded in a battery power system with long wire. I would like access to UART1 over the wire, which we have decided to use half duplex RS-485 for. Is there a way to make the UART1 integrat... - We got kernel config fragments working, then we set about making more of them.
We made small fragments that were named with their purpose, like "disable-fb-console.cfg", "set-cpu-scaling-to-performance.cfg", "set-timer-hz-to-1000.cf... - JB 02:44 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Is it possible to use the u-boot binary env file?
- Hi Nathan,
I have been looking into this but have been unable to add saveenv back in. I'm glad you found a work around. I will keep you updated if I do find something.
Best,
Joshua Bourgeot - NW 01:59 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Is it possible to use the u-boot binary env file?
- For posterity, we figured out how to restore u-boot-initial-env text file and then we placed a fake uboot.env file in place and libubootenv rebuilt the uboot.env file.
This allowed us to let swupdate believe it was passing state to ub...
06/14/2024
- I see on e2e.ti.com that some posts imply there might be a way to restore use of saveenv and the binary boot.env file.
The posts do not state how to restore it though. :(
If it is possible to restore that functionality, it will ...
06/13/2024
- NW 11:41 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- We are testing simply placing a hook in to bootcmd via the uboot menuconfig, between load environment and booting.
Then we will just have that hook defined in our uEnv for now. It will do the work of partition selection.
Thanks!
06/12/2024
- JC 10:19 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- > Turns out I don't think is what I am looking for. That is for delivering a uEnv file via a swu file, and optionally not overwriting some environment settings.
Ah sorry didn't notice that.
This page describes an interface and how to... - NW 07:38 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- Turns out I don't think is what I am looking for. That is for delivering a uEnv file via a swu file, and optionally not overwriting some environment settings.
To manage partition swapping from an update, swupdate wants to have a shar... - NW 05:40 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- Excellent! Thanks.
- JB 05:38 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- Hi Nathan,
TI has removed this functionality in the new 9 sdk, see "here":https://software-dl.ti.com/processor-sdk-linux/esd/AM62AX/09_02_00/exports/docs/linux/Foundational_Components/U-Boot/UG-General-Info.html#u-boot-environment. Th...
06/11/2024
- Hello,
It appears that support for u-boot environment has been limited to uEnv.txt. We are trying to use swupdate project which wants to use the u-boot/userspace fw_setenv/fw_printenv utilities to swap which rootfs get used. What is... - NW 08:51 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: suggestion: add parted and mtools to docker-pocky
- Thanks! Specifying -n to identify where the tools are does work.
- JB 07:19 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: suggestion: add parted and mtools to docker-pocky
- Hi Nathan,
The Docker-poky script uses the Crops poky docker image (https://hub.docker.com/r/crops/poky), so we don't have control over what's installed on the image.
However, Yocto does build those tools as part of the build proc... - You need them if you want to use the wic tool to inspect wic files that have fat partitions.
I attach to a running container as root and install them myself right now. It wouldn't hurt to have them in the image to begin with.
06/10/2024
- AK 11:40 AM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- Arun Krishnan wrote in message#6643:
> Solved the error by adding botton lines to to the ipc.cfg
> ...
This was not mentioned in the wiki page - AK 11:39 AM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- Solved the error by adding botton lines to to the ipc.cfg
var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
Resource.customTable = true;
- AK 10:51 AM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- When I try to build the application, I am getting the error "error #10056: symbol "ti_ipc_remoteproc_ResourceTable" redefined: first defined in "./rsc_table_vayu_dsp.obj"; redefined in "/home/xxx/workspace_v10/rtos_template_app_am572x_c6...
- MW 11:08 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- There is a cross-bar that sits between EMIFA on the L138 and the DSP / ARM / peripheral masters.
When a read request is generated by the DSP to the EMIFA space, a command/request is generated to the cross-bar controller. The controll... - KB 07:52 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- Thank you for answer.
We will conduct the above experiment later.
Currently, we are trying to increase the RD Clk speed of FIFO.
MDK_2014-01-13/sw/ARM/u-boot-mitydspl138/board/davinci/mityomapl138/mityomapl138.c
In the file abo...
06/07/2024
- PS 08:55 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: AM62A module SODIMM pinout documentation error
- William,
I see that you have released an update to the datasheet. Unfortunately it is contradicting now. The 3rd column is changed in the respective table, but the pinmux alternatives and the BGA ball numbers are unchanged (columns 5-...
06/05/2024
- GG 09:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- Hello,
Based on the FPGA code you shared I believe that the primary issue you are having is that your FPGA code requires transitions on i_ema_cs5_n or i_ema_oe_n in order to read out new FIFO samples. These transitions are most likel... - KB 12:42 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- Thank you for answer.
As you suggested, read Cache_and_Memory and
We proceeded by modifying the source as shown below.
06/04/2024
- SW 05:17 PM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- Thanks for the all the info John. I posted to e2e also hoping TI could provide some more info on how dmtimer and clock modules work. Probably a tutorial somewhere on there. Seems like plenty of reference material but light on user manua...
- JP 02:04 PM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- For the benefit of others, Stanley has also posted this question to an E2E forum at https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1369167/am5728-clock-timer-and-power-idle-questions.
> 1. Why the DRA7XX an...
06/03/2024
- JC 03:08 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- The fpga guys can step in if I've missed something but it looks to me like your missing cache invalidate calls. If the DMA engine is modifying RAM outside of the DSPs knowledge, then the DSP needs to be informed that its cache of that m...
- hello.
I am posting because I have a question related to DMA.
The last CCS issue was not resolved, so I am loading the DSP application through ARM. (Thank you to those who helped.)
The work I am currently doing is accumulating data ... - Reference: https://support.criticallink.com/git/mitysom-am57x-ref.git
I've built and successfully run the ex02_messageq example from the repo listed above. However I have several questions.
The ex02_messageq example seems to be the ...