Mity CPU Platforms

07/10/2024

DV 01:08 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board PL fabric ethernet access

Hello,
For the case that you are seeing 60% packet lose, what did you change in the reference FPGA project that was supplied in the bnet_mps project? Also have you verified that your project is meeting timing?
Best regards,
Dan
Daniel Vincelette

BK 12:07 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: how to access gpio using pio ip core in c code

Yes, I wanted to send the 256 BITS of raw data from HPS to FPGA. Can you give me the supplies for that. Bhardwaj Kotha

07/09/2024

DV 05:44 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: AM62A module SODIMM pinout documentation error

My mistake. I completely missed the A when I saw this thread. :)
Thanks,
David David Van Sickle

MW 02:43 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: AM62A module SODIMM pinout documentation error

Hi David,
The symbol for the MitySOM-AM62 DevKit is for the MitySOM-AM62x and we have verified it is correct. The information in the thread above is for the datasheet for the MitySOM-AM62Ax.
While the DevKit board is compatible wi... Michael Williamson

DV 02:12 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: AM62A module SODIMM pinout documentation error

Hello,
This was brought to my attention and I decided to do a quick check of these pins on the AM62 Dev board schematic, which our current work is based around.
On the schematic symbol for the MitySOM_AM62: pins 99, 101, 103 agree ... David Van Sickle

07/08/2024

TI 03:09 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file

I just did a clean pull of the kernel and built it using the poky 3.0.4 sdk with no issues.
It sounds like either there was some old/other config in the build tree or your environment is different
my build did _not_ attempt to build th... Tim Iskander

GG 01:20 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: How to access gpio using c code in yocto linux, which is created using PIO IP with HPS

This seems to be a duplicate of https://support.criticallink.com/redmine/boards/45/topics/6705. Please refer to the other linked topic for further details.
Thanks,
Greg Gregory Gluszek

GG 01:18 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: how to access gpio using pio ip core in c code

Hello,
Can you share capture of your console so we can evaluate what commands you are using and exactly what errors are being reported?
As long as you do not exceed resources on the FPGA you should be able to add the required pio ... Gregory Gluszek

07/07/2024

BK 01:01 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file

Hi,
I have downloaded the kernel from https://git.criticallink.com/gitweb/?p=linux-socfpga.git;a=shortlog;h=refs/heads/socfpga-5.4.23-lts (branch socfpga-5.4.23-lts) and updated the device tree and defconfig files by taking them fr... Bhardwaj Kotha

07/05/2024

BK 08:53 AM MitySOM-5CSX Altera Cyclone V Software Development: How to access gpio using c code in yocto linux, which is created using PIO IP with HPS

Hi,
I have added pio ip (output only) to the HPS block design in platform designer, and modified/added gpio block with address specification by converting the dtb file to dts. Again compiled back to new dtb and replaced in pre built os ... Bhardwaj Kotha

BK 08:51 AM MitySOM-5CSX Altera Cyclone V Software Development: how to access gpio using pio ip core in c code

Hi,
I have added pio ip (output only) to the HPS block design in platform designer, and modified/added gpio block with address specification by converting the dtb file to dts. Again compiled back to new dtb and replaced in pre built ... Bhardwaj Kotha

07/04/2024

BK 07:34 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hi Daniel,
Now am able to generate the boot files.
Thanks & Regards,
Bhardwaj Bhardwaj Kotha

BK 07:02 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board PL fabric ethernet access

Hi,
I donot have much resources, as my application need more resources, I wanted to use HPS EMAC. And I am not going to implement any other IP layers, I just modify the data part and forward on the other port. For this, I have made emac... Bhardwaj Kotha

07/03/2024

JC 02:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Michael Bisbano wrote in message#6697:
> Hi Jonathan,
> ...
We have some posted power usage measurements for the module here: https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/33V_Supply_Requirements
A max of 1W l... Jonathan Cormier

NW 01:09 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: oe-layertool-setup.sh script seems to pull and merge when it shouldn't need to

Ok, I did. Nathan Wright

07/02/2024

JC 08:46 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: oe-layertool-setup.sh script seems to pull and merge when it shouldn't need to

I think both of these make a lot of sense. I'd recommend reporting this to TI via the meta-arago mailing list. They should even include your name as the patch author.
Here is the last patch submitted related to the oe-layertool-setu... Jonathan Cormier

NW 07:16 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: oe-layertool-setup.sh script seems to pull and merge when it shouldn't need to

while we're at it, why let it complain about detached heads when the config file asked for detached heads? Nathan Wright

NW 06:51 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: oe-layertool-setup.sh script seems to pull and merge when it shouldn't need to

We noticed in our pipeline setup that the oe-layertool-setup.sh script still appeared to be pulling and merging against a cached repo that had no changes. We are on ubuntu 24.
We think this fixes it...
diff --git a/oe-layertool-se... Nathan Wright

07/01/2024

MB 09:16 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Hi Jonathan,
Thank you for the response, please let me know what you find out! The system as a whole must be under 1W average while operating, and very low <50mW when in sleep. When operating, it will be performing some audio signal pr... Michael B

JC 07:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Michael Bisbano wrote:
> Hi all,
> ...
Hi Michael, I did a bunch of work for the MitySOM-335x for sleep mode but am not sure about the L138. I'll ask around and let you know what I find out.
>
> ...
In the meantime could you clarif... Jonathan Cormier

MB 06:34 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Hi all,
I was wondering if anyone had data on power draw for the MityDSP-L138 in deep sleep? My application is battery powered and we are determining if it is more feasible to have an external circuit on our custom baseboard control p... Michael B

DV 06:18 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hello,
You shouldn't need to update the compiler or path from the default that are filled out by the bsp-editor. Did you also run into errors when you used the default cross compiler that was choosen by the bsp-editor?
Best regards... Daniel Vincelette

JC 03:49 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Fred Weiser wrote in message#6688:
> Changing the timer is probably not in my best interest; my project supports down to 1200 baud with packets up to 256 in length (that's over 2 seconds). I see two possibilities:
Can you try it just t... Jonathan Cormier

06/30/2024

TI 05:51 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file

Here is a link to the SDK for the 5CSx
you will need to run it on a linux machine (ubuntu 18 and up recommended)
https://support.criticallink.com/files/socfpga/poky-glibc-i686-epstech-image-bnet-mps-cortexa9hf-neon-mitysom-c5-toolchain... Tim Iskander

06/29/2024

BK 04:42 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hi Daniel,
Thank you for providing the information regarding booting. I understand the process to boot the cyclone v board.
I had followed the process which is mentioned in [[https://support.criticallink.com/redmine/projects... Bhardwaj Kotha

06/28/2024

TI 03:59 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file

If you just need to build the kernel and device tree, you can download the kernel from https://git.criticallink.com/gitweb/?p=linux-socfpga.git;a=shortlog;h=refs/heads/socfpga-5.4.23-lts (branch socfpga-5.4.23-lts is what we used for the... Tim Iskander

DV 01:34 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hello,
The Altera Cyclone V SoC boot process involves several steps to initialize and start up the system. The Cyclone V SoC integrates an ARM-based Hard Processor System (HPS) with FPGA fabric, and the boot process encompasses both t... Daniel Vincelette

06/27/2024

FW 09:06 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Changing the timer is probably not in my best interest; my project supports down to 1200 baud with packets up to 256 in length (that's over 2 seconds). I see two possibilities:
# Add RTS/CTS back into the pinmux, disable the 485 confi... Fred Weiser

FW 06:12 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Here's the snip: Fred Weiser

JC 05:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Looks like wait_for_xmitr has a 10ms timeout, this might explain why the TXEN is enabled for a constant time. At low baud rates the 10ms timeout would be more of an issue I suspect.
Note in newer kernels, the stop_tx call checks the ... Jonathan Cormier

JC 04:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

What does your pinmux look like for UART2? Jonathan Cormier

FW 03:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Please see two attached scope traces; the second with a 7 character buffer, the first with a 16 character buffer. I wanted to provide some objective evidence to your comments above... Notice the RTS active time is the same; it is that wa... Fred Weiser

TI 02:31 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

It looks like (in the 3.2 kernel anyway) the only serial port driver that supports the delay_rts_after_send option is the atmel_serial.c, and it uses features of the UART to implement it.
You could implement this in the 8250 driver and ... Tim Iskander

FW 01:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Thanks for the ideas; I'm looking into the code cited above now; I don't have any new news there at this time.
However, here is some additional info: when the RTS line drops early, it may be a partial character, or sometimes as many ... Fred Weiser

TI 01:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

My suspicion is that the register read in wait_for_xmitr() is "lying" and the UART is actually still serializing the data even though it says the TSR is empty.
My suggestion is to put a delay of 1 char before releasing the GPIO. This co... Tim Iskander

JC 08:47 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1

Seems like it could work. Good find. Jonathan Cormier

MB 07:17 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1

I did come across this application note from TI: https://www.ti.com/lit/ug/tidubw6/tidubw6.pdf?ts=1719509747706
(if the link is broken in the future to others with this need, the article is titled: "TIDUBW6 - June 2016: TI Designs Autom... Michael B

BK 05:36 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hi Daniel,
I had the tested the booting by the link which you have mentioned. It is working but getting an error related to ethernet but the board is booted.
Is any FPGA code mandatory to boot the hps?
Can we boot the hps without ... Bhardwaj Kotha

BK 08:21 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file

Hi,
We need to build the project from provided jenkins file, and further we are going to modify or add avalon interface to communicated HPS and PL fabric, so we need to regenerate the device tree and build some software on top of it... Bhardwaj Kotha

06/26/2024

DV 06:48 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file

Hello,
I believe the Jenkins file you are referring to was provided as a reference and contains internal links to repositories at Critical Link. These links will need to be replaced with the repositories you will be hosting. Are you t... Daniel Vincelette

BK 05:31 PM MitySOM-5CSX Altera Cyclone V Software Development: Get URL from jenkins file

Hi,
we have an Jenkins file, but we are new to Jenkins and i am not able to get URL from the Jenkins file. Help me out to get the that link and can you guide me the usage and Procedure of Jenkins
Thanking you,
Bhardwaj Kotha. Bhardwaj Kotha

06/25/2024

JC 09:59 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

The kernel driver code for RS485 support can be found here: https://support.criticallink.com/gitweb/?p=linux-davinci.git;a=blobdiff;f=drivers/tty/serial/8250.c;h=fd19e7d82137f1bcccae36b6cade7878267fc8f9;hp=eeadf1b8e093202234b30c688490da2... Jonathan Cormier

FW 06:58 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Seems a "paste" didn't work as expected...
SER_RS485_USE_GPIO is the same as 1<<5 Fred Weiser

FW 06:54 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Serial port 2 issue, RS485, RTS drops to early

We are having a problem with serial port ttyS2 on our L138 SoM which I believe resides in the Linux driver or the TI serial port support. The port is used as a RS-485 interface running Modbus, which requires using the RTS line to control... Fred Weiser

JP 04:33 PM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle

Please note that the wiki page "Memory_Overview":https://support.criticallink.com/redmine/projects/mitysom_am57x/wiki/Memory_Overview does have a link to "Customizing Multicore Applications":https://www.ti.com/lit/an/sprac60/sprac60.pdf ... John Pruitt

DV 02:01 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board PL fabric ethernet access

Hello,
If you want to intergate the data inside the FPGA instead of having the HPS involved you could look into using Altera's Triple Speed Ethernet MAC: https://www.intel.com/content/www/us/en/docs/programmable/683402/22-4-21-1-0/exa... Daniel Vincelette

BK 10:01 AM MitySOM-5CSX Altera Cyclone V FPGA Development: MitySOM-5csx custom board PL fabric ethernet access

Hi all, I am working on a project where two ethernet interfaces, are connected through PL fabric, using GMII to RGMIIConvertor Core which converts RGMII to SGMII and HPS EMAC Interface Splitter Core. Here the emac signals connected to HP... Bhardwaj Kotha

06/24/2024

DV 08:39 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hello,
From the error it looks like the SPL isn't able to correctly read the MBR/Partition table on the SD card. This could be due to misconfiguration of the pinmux in your FPGA design. As a sanity check, could you try our Quartus 18.... Daniel Vincelette

BK 08:03 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hi Daniel,
Can you please tell me why this error is coming while booting.
I am facing this issue from last 15 days. Please give some solution ASAP to this error.
Thanks,
Bhardwaj Bhardwaj Kotha

JB 02:55 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Does yocto support multiple config fragments?

Hi Nathan,
I just tested multiple config fragments, and everything worked for me. Here is part of the simple config file I tested.
linux-cl-ti_6.1.bbappend: Joshua Bourgeot

06/21/2024

BK 05:25 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hello Daniel,
I will wait for your response. I am working on HPS only at present.
Thanks,
Bhardwaj Bhardwaj Kotha

06/20/2024

JC 08:06 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Does yocto support multiple config fragments?

Hi Nathan, the config fragments are handled by a TI recipe located at sources/meta-ti/meta-ti-bsp/recipes-kernel/linux/setup-defconfig.inc
though we copied it to sources/meta-mitysom/recipes-kernel/linux/setup-defconfig.inc incase TI re... Jonathan Cormier

JC 07:57 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1

How long are you looking for?
The kernel documentation mentions getting extended distance for rs232 by using UTP cat 5 cable. Or using a shield low-capacitance wire. Also mentions using line drivers to get larger distances.
https://... Jonathan Cormier

MB 03:43 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1

Hi Jonathan,
thanks for the quick response. I will look into the 8250 driver, it might be useful (if only for my runtime code). I expected a hesitant response with regard to this scheme, but half duplex RS485 is unfortunately the mos... Michael B

DV 03:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Hello,
We are currently in the process of updating our instructions for building the FPGA, bootloaders, and filesystem with latest major versions provided by Altera. These instructions will be tailored and tested for our SOM, which we... Daniel Vincelette

BK 02:32 PM MitySOM-5CSX Altera Cyclone V Software Development: Error in u-boot. cyclone v 5CSEBA4U2317 SOM

Dear sir/madam,
                              I am working on cyclone v 5CSEBA4U2317 SOM with custom board. I am using U-boot -socfpga-socfpga_v2023.10 and linux-socfpga-socfpga-6.1.68-lts files for generating u-boot-with-spl.sfp ,zIm... Bhardwaj Kotha

06/19/2024

JC 07:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1

The serial 8250 driver has an rs485 mode which we extended to allow using a gpio to generate a RS485 TX enable. However this was intended to be setup at runtime for a separate interface and not for the debug console. Though you may be ... Jonathan Cormier

MB 04:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RS485 Direction Control on UART1

Hi all,
My application requires installation embedded in a battery power system with long wire. I would like access to UART1 over the wire, which we have decided to use half duplex RS-485 for. Is there a way to make the UART1 integrat... Michael B

NW 03:09 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: Does yocto support multiple config fragments?

We got kernel config fragments working, then we set about making more of them.
We made small fragments that were named with their purpose, like "disable-fb-console.cfg", "set-cpu-scaling-to-performance.cfg", "set-timer-hz-to-1000.cf... Nathan Wright

JB 02:44 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Is it possible to use the u-boot binary env file?

Hi Nathan,
I have been looking into this but have been unable to add saveenv back in. I'm glad you found a work around. I will keep you updated if I do find something.
Best,
Joshua Bourgeot Joshua Bourgeot

NW 01:59 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Is it possible to use the u-boot binary env file?

For posterity, we figured out how to restore u-boot-initial-env text file and then we placed a fake uboot.env file in place and libubootenv rebuilt the uboot.env file.
This allowed us to let swupdate believe it was passing state to ub... Nathan Wright

06/14/2024

NW 01:50 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: Is it possible to use the u-boot binary env file?

I see on e2e.ti.com that some posts imply there might be a way to restore use of saveenv and the binary boot.env file.
The posts do not state how to restore it though. :(
If it is possible to restore that functionality, it will ... Nathan Wright

06/13/2024

NW 11:41 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv

We are testing simply placing a hook in to bootcmd via the uboot menuconfig, between load environment and booting.
Then we will just have that hook defined in our uEnv for now. It will do the work of partition selection.
Thanks! Nathan Wright

06/12/2024

JC 10:19 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv

> Turns out I don't think is what I am looking for. That is for delivering a uEnv file via a swu file, and optionally not overwriting some environment settings.
Ah sorry didn't notice that.
This page describes an interface and how to... Jonathan Cormier

NW 07:38 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv

Turns out I don't think is what I am looking for. That is for delivering a uEnv file via a swu file, and optionally not overwriting some environment settings.
To manage partition swapping from an update, swupdate wants to have a shar... Nathan Wright

NW 05:40 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv

Excellent! Thanks. Nathan Wright

JB 05:38 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv

Hi Nathan,
TI has removed this functionality in the new 9 sdk, see "here":https://software-dl.ti.com/processor-sdk-linux/esd/AM62AX/09_02_00/exports/docs/linux/Foundational_Components/U-Boot/UG-General-Info.html#u-boot-environment. Th... Joshua Bourgeot

06/11/2024

NW 09:07 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: Managing the u-boot environemt, uEnv.txt and fw_setenv

Hello,
It appears that support for u-boot environment has been limited to uEnv.txt. We are trying to use swupdate project which wants to use the u-boot/userspace fw_setenv/fw_printenv utilities to swap which rootfs get used. What is... Nathan Wright

NW 08:51 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: suggestion: add parted and mtools to docker-pocky

Thanks! Specifying -n to identify where the tools are does work. Nathan Wright

JB 07:19 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: suggestion: add parted and mtools to docker-pocky

Hi Nathan,
The Docker-poky script uses the Crops poky docker image (https://hub.docker.com/r/crops/poky), so we don't have control over what's installed on the image.
However, Yocto does build those tools as part of the build proc... Joshua Bourgeot

NW 05:23 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: suggestion: add parted and mtools to docker-pocky

You need them if you want to use the wic tool to inspect wic files that have fat partitions.
I attach to a running container as root and install them myself right now. It wouldn't hurt to have them in the image to begin with. Nathan Wright