Activity
From 06/06/2025 to 07/05/2025
07/03/2025
- SG 06:31 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Unable to program FPGA – “MSEL switch is in the wrong position” on MitySOM-5CSX dev kit
- Hello,
We were able to recreate your issue with the app you were using (https://github.com/robseb/rstoolsCY5). After compiling the app and running it on the board as you did, we were able to move past your issue by setting the MSEL sw...
07/02/2025
- I’m bringing up our new MitySOM-5CSX evaluation board and ran into an issue while trying to load the reference bitstream that ships with the kit.
1- I copied dev_5cs.rbf to the board via SCP.
2- From the Linux prompt on the board I... - MW 03:07 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit
- I believe the spreadsheets are correct.
T13 is not connected to a dedicated clock input pin, needed to feed a REFCLK/CLK clock network. It is on pin 155 of the *SOM* connector.
HSMC2_CLK_P driving pin 155 of the *Partial HSMC* con... - I am posting this on behalf of a customer.
I would like to verify that th...
06/30/2025
- MW 10:02 AM MitySOM-AM57X FPGA Development: RE: Requesting the source/origin for the fpga bin in the default image in the sd card provided along with the evk.
- Hello,
It is the same one as documented on the [[FPGA_Example_Projects]] page. The only difference is that the target device was changed to the 50 KLE part number instead of the 15 KLE part number in the project settings.
Please l... - Hi,
We are working currently with the AM57 devkit with FPGA and using the sd card image provided along with the evk.
Our query is regarding the *fpga_7a50t.bin* file in the image.
Specifically, if there is any source project avai...
06/24/2025
- MF 05:54 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Tutorial or documentation detailing the setup process specifically on how to load binaries onto the FPGA and HPS parts for executing tasks
- I would recommend installing the Quartus version needed for your project onto your build machine (not the virtual machine) following Intel's installation instructions. Once you have the tools installed and can successfully compile the FP...
- I am posting this on behalf of a customer.
I am currently using your CriticalLink evaluation board, which we acquire... - MW 11:53 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Issue with Native EtherCAT Driver Installation on AM62A with IGH Stack
- Hi Debashis,
I think you are correct.
I only have seen TI mentioning supporting CODESYS for ethernet master operations an the AM62x family. For slave you'd likely have to run the R5F and I don't think you can share the switch with... - RD 10:55 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Issue with Native EtherCAT Driver Installation on AM62A with IGH Stack
- Hi Experts,
Both interfaces are linked to the same bus address (8000000.ethernet), which I understand represents a single CPSW Ethernet controller.
To illustrate the architecture:
+---------------------------+
| Linux Network Int... - Dear Support Team,
I am currently working on integrating the EtherCAT native driver on a MitySOM-AM62Ax platform using the EtherCAT IGH master stack.
During the configuration process, I encountered the following issue:
I compile...
06/11/2025
- TR 06:00 AM MitySOM-AM57X Software Development: RE: Interfacing pca9535 with arm using i2c expanders (J5)(i2c5)
- Thank you
Will update if anything else comes up.
06/10/2025
- JC 03:07 PM MitySOM-AM57X Software Development: RE: Interfacing pca9535 with arm using i2c expanders (J5)(i2c5)
- Thejas Raj wrote in message#6981:
> Hi,
> ...
First please note that the R6/T9 pins will be 1.8V logic level. If your device is 3.3V logic level you will need a voltage translator similar to U5 on the devkit.
> Can you give us the ... - TR 10:04 AM MitySOM-AM57X Software Development: RE: Interfacing pca9535 with arm using i2c expanders (J5)(i2c5)
- Hi,
So we were able to interface i2c5 of the evk with our pca 9535 i2c device.
As of now we also require i2c4 of the evk/som whose scl and sda are currently muxed to gpio7_3 (R6) and gpio7_4 (T9) respectively.
Can you give us the...