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From 01/12/2026 to 02/10/2026
02/10/2026
- DR 11:55 PM Firmware: RE: Clock EN signal and I2C Dual purpose pin
- Oh, I have an old version of the datasheet (August 8 2024) that says this. Grabbing the updated version now from your site. I think that clears up the issue, thanks!
- MF 11:09 PM Firmware: RE: Clock EN signal and I2C Dual purpose pin
- Hi Dean,
Pin AH2 is our CLKUSR enable pin. This does not leave the SOM and only goes to the enable pin of the 100 MHz oscillator. The output of the oscillator is then fed into Pin Y15. If you did not want to use the 100 MHz oscillator... - Regarding FPGA ball location AH2 "SCL_1V8". From my understanding, this pin can be driven low to enable the 100MHz CLKUSR on Y15. This is my global ref clock input.
This pin is labeled as "SCL_1V8" (I/O signal used for I2C).
Is it...