Activity

From 04/14/2026 to 05/13/2026

DC 09:45 PM PCB Development: USB3 Data Port with External PD Control: Hey Team,
I'm working on porting a hardware design for a custom carrier board to leverage the MitySOM platform. This carrier board owns the USB3 port's CC lines for PD negotiation and cable orientation detection. We don't need Displa... David Cuccia

NO 12:33 AM Software Development: UART bringup: I've got a device tree building for my carrier board, and a custom QUP configuration working! However, only 4 out of 5 of my UARTs are working. uart14 returns an error when it is probed. Here's the relevant output from dmesg: Nathan Olson

NO 06:58 PM Software Development: RE: Processor rebooting: Thanks Greg. I'll leave USB1 enabled for now as I work on bringing up other peripherals. I'd love to eventually figure out how to disable it, especially if that can result in any power savings. Nathan Olson
GG 06:34 PM Software Development: RE: Processor rebooting: Hi Nathan,
Thank you for all the information. We have worked with another design that also did not connect the SS lines for this USB and they have not had to make the same changes in the DTS (e.g. having usb_1_qmpphy enabled is not a... Gregory Gluszek

NO 11:24 PM Software Development: RE: Processor rebooting: I've narrowed it down even further. The problem does not occur if I use CriticalLink's QUPConfig and the following device tree: Nathan Olson

NO 09:22 PM Software Development: RE: Processor rebooting: Here are the QUP config changes I'm building in the TZ. Nathan Olson
NO 07:12 PM Software Development: RE: Processor rebooting: Here's a minimal layer that reproduces the problem, and the boot log from running it. Nathan Olson
NO 04:23 PM Software Development: RE: Processor rebooting: Attached are boot logs from every combination of carrier board and image. The processor always reboots with my image on either carrier board, so I believe it is a problem with the image.
I'll work on stripping out all my changes to tr... Nathan Olson

NO 07:41 PM Software Development: RE: Processor rebooting: My system is powered by a DC power supply at 3.7V.
Thanks for the suggestions about trying all combinations of my image vs prebuilt image and dev board vs. my carrier board. That should at least narrow it down on HW vs. SW. I'll do th... Nathan Olson
GG 06:23 PM Software Development: RE: Processor rebooting: Sorry I forgot to answer your question regarding the remoteprocs.
These dts entries relate to subsystems on the QCS6490:
* adsp refers to the audio digital signal processor
* cdsp refers to the compute digital signal processor (als... Gregory Gluszek
GG 05:58 PM Software Development: RE: Processor rebooting: Hi Nathan,
Sorry to hear you're having this issues. Thank you for providing these details so we can get the bottom of it quickly.
I see that the min/max for vcc_vbat is 3.7V (compared to the 4V we have this set for for our dev ki... Gregory Gluszek

NO 10:18 PM Software Development: Processor rebooting: I've been working on bringing up my custom carrier board. I've modified the device tree and the QUP config per the instructions. The SOM is booting up, but shortly after it boots it stops responding, and then reboots. It stays booted for... Nathan Olson

WE 12:02 PM PCB Development: RE: Power Consumption: Hayden,
Perfect, I'm glad I could help! If you have any further questions please let us know!
Will William Evans

HS 09:18 PM PCB Development: RE: Power Consumption: Hey Will,
Thanks for the quick response!
I was able to follow your direction and disable many of the baseboard components. I am powering the board through the battery connector, and so most of those components were already disabled... Hayden Smith

WE 07:49 PM PCB Development: RE: Power Consumption: Hayden,
We don't currently have a minimum quiescent operating power for the SOM. Current consumption on the SOM alone is heavily influenced by the software running on the processor, clock states, and background processes all contribut... William Evans
HS 03:02 PM PCB Development: Power Consumption: Hello,
I am currently doing a power analysis of the MitySOM-QC6490 (80-001777RI-2). We are interested in operating the QC6490 SOM in the lowest possible power setting to preserve battery life,
while still actively processing data in ... Hayden Smith
GG 06:04 PM PCB Development: RE: 4V on 3V3-SOM!: I just wanted to update that the datasheets for the SOM and Dev Board at https://www.criticallink.com/products/?filter=qualcomm-based have been updated to accurately detail that the BOB voltage is 4V Gregory Gluszek

MW 08:13 PM Software Development: RE: SPI bringup: Hi Nathan,
I think you can remove the NFC pins and give it a shot.
-Mike Michael Williamson
NO 07:49 PM Software Development: RE: SPI bringup: The original commit message for those lines is "Add gpio-reserved-ranges for QCM6490 boards."
In mainline linux, I found the following in qcs6490-rb3gen2.dts: Nathan Olson
NO 07:01 PM Software Development: RE: SPI bringup: Edit: The boot crash in unrelated and I've resolved that. However, SPI configuration still fails: Nathan Olson

NO 09:04 PM Software Development: SPI bringup: Are there any reference examples of software using SPI? I'm attempting to configure the QUP to use SPI on my carrier board.
Here's my device tree modification: Nathan Olson

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Mity CPU Platforms » MitySOM-QC6490