1
|
//Register map for use with AN428 (JumpStart)
|
2
|
//http://www.skyworksinc.com/timing
|
3
|
//#BEGIN_HEADER
|
4
|
//Date = Tuesday, July 11, 2023 3:14 PM
|
5
|
//File version = 3
|
6
|
//Software Name = ClockBuilder Pro
|
7
|
//Software version = 4.9.0.0
|
8
|
//Software date = 4 11, 2023
|
9
|
//Chip = Si533x
|
10
|
//Part Number = Si533x
|
11
|
//#END_HEADER
|
12
|
//Input Frequency (MHz) = 25.000000000
|
13
|
//Input Type = Crystal
|
14
|
//P1 = 1
|
15
|
//Input Mux = XoClk
|
16
|
//FDBK Input Frequency (MHz) = 25.000000000
|
17
|
//FDBK Input Type = OFF
|
18
|
//P2 = 1
|
19
|
//FDBK Mux = NoClk
|
20
|
//PFD Input Frequency (MHz) = 25.000000000
|
21
|
//VCO Frequency (GHz) = 2.750000
|
22
|
//N = 110 (110.0000)
|
23
|
//Internal feedback enabled
|
24
|
//Output Clock 0
|
25
|
// Output Frequency (MHz) = 125.000000000
|
26
|
// Mux Selection = IDn
|
27
|
// MultiSynth = 22 (22.0000)
|
28
|
// R = 1
|
29
|
//Output Clock 1
|
30
|
// Output is off
|
31
|
//Output Clock 2
|
32
|
// Output Frequency (MHz) = 322.265625000
|
33
|
// Mux Selection = IDn
|
34
|
// MultiSynth = 8 8/15 (8.5333)
|
35
|
// R = 1
|
36
|
//Output Clock 3
|
37
|
// Output is off
|
38
|
//Driver 0
|
39
|
// Enabled
|
40
|
// Powered on
|
41
|
// Output voltage = 1.80
|
42
|
// Output type = 1.8V LVDS
|
43
|
// Output state when disabled = AlwaysOn
|
44
|
//Driver 1
|
45
|
// Disabled
|
46
|
// Powered off
|
47
|
// Output voltage = 1.80
|
48
|
// Output type = 1.8V LVDS
|
49
|
// Output state when disabled = AlwaysOn
|
50
|
//Driver 2
|
51
|
// Enabled
|
52
|
// Powered on
|
53
|
// Output voltage = 1.80
|
54
|
// Output type = 1.8V LVDS
|
55
|
// Output state when disabled = AlwaysOn
|
56
|
//Driver 3
|
57
|
// Disabled
|
58
|
// Powered off
|
59
|
// Output voltage = 3.30
|
60
|
// Output type = 3.3V LVDS
|
61
|
// Output state when disabled = StopLow
|
62
|
//Clock 0 phase inc/dec step size (ns) = 0.000
|
63
|
//Clock 1 phase inc/dec step size (ns) = 0.000
|
64
|
//Clock 2 phase inc/dec step size (ns) = 0.000
|
65
|
//Clock 3 phase inc/dec step size (ns) = 0.000
|
66
|
//Phase increment and decrement pin control is off
|
67
|
//Frequency increment and decrement pin control is off
|
68
|
//Frequency increment and decrement is disabled
|
69
|
//Initial phase offset 0 (ns) = 0.000
|
70
|
//Initial phase offset 1 (ns) = 0.000
|
71
|
//Initial phase offset 2 (ns) = 0.000
|
72
|
//Initial phase offset 3 (ns) = 0.000
|
73
|
//SSC is disabled
|
74
|
|
75
|
#define NUM_REGS_MAX 350
|
76
|
|
77
|
typedef struct Reg_Data{
|
78
|
unsigned char Reg_Addr;
|
79
|
unsigned char Reg_Val;
|
80
|
unsigned char Reg_Mask;
|
81
|
} Reg_Data;
|
82
|
|
83
|
Reg_Data const code Reg_Store[NUM_REGS_MAX] = {
|
84
|
{ 0,0x00,0x00},
|
85
|
{ 1,0x00,0x00},
|
86
|
{ 2,0x00,0x00},
|
87
|
{ 3,0x00,0x00},
|
88
|
{ 4,0x00,0x00},
|
89
|
{ 5,0x00,0x00},
|
90
|
{ 6,0x08,0x1D},
|
91
|
{ 7,0x00,0x00},
|
92
|
{ 8,0x70,0x00},
|
93
|
{ 9,0x0F,0x00},
|
94
|
{ 10,0x00,0x00},
|
95
|
{ 11,0x00,0x00},
|
96
|
{ 12,0x00,0x00},
|
97
|
{ 13,0x00,0x00},
|
98
|
{ 14,0x00,0x00},
|
99
|
{ 15,0x00,0x00},
|
100
|
{ 16,0x00,0x00},
|
101
|
{ 17,0x00,0x00},
|
102
|
{ 18,0x00,0x00},
|
103
|
{ 19,0x00,0x00},
|
104
|
{ 20,0x00,0x00},
|
105
|
{ 21,0x00,0x00},
|
106
|
{ 22,0x00,0x00},
|
107
|
{ 23,0x00,0x00},
|
108
|
{ 24,0x00,0x00},
|
109
|
{ 25,0x00,0x00},
|
110
|
{ 26,0x00,0x00},
|
111
|
{ 27,0xF1,0x80},
|
112
|
{ 28,0x16,0xFF},
|
113
|
{ 29,0x90,0xFF},
|
114
|
{ 30,0xB0,0xFF},
|
115
|
{ 31,0xC0,0xFF},
|
116
|
{ 32,0xE3,0xFF},
|
117
|
{ 33,0xC0,0xFF},
|
118
|
{ 34,0xE3,0xFF},
|
119
|
{ 35,0x2A,0xFF},
|
120
|
{ 36,0x06,0x1F},
|
121
|
{ 37,0x00,0x1F},
|
122
|
{ 38,0x06,0x1F},
|
123
|
{ 39,0x00,0x1F},
|
124
|
{ 40,0x84,0xFF},
|
125
|
{ 41,0x10,0x7F},
|
126
|
{ 42,0x23,0x3F},
|
127
|
{ 43,0x00,0x00},
|
128
|
{ 44,0x00,0x00},
|
129
|
{ 45,0x00,0xFF},
|
130
|
{ 46,0x00,0xFF},
|
131
|
{ 47,0x14,0x3F},
|
132
|
{ 48,0x30,0xFF},
|
133
|
{ 49,0x00,0xFF},
|
134
|
{ 50,0xC2,0xFF},
|
135
|
{ 51,0x07,0xFF},
|
136
|
{ 52,0x10,0xFF},
|
137
|
{ 53,0x00,0xFF},
|
138
|
{ 54,0x09,0xFF},
|
139
|
{ 55,0x00,0xFF},
|
140
|
{ 56,0x00,0xFF},
|
141
|
{ 57,0x00,0xFF},
|
142
|
{ 58,0x00,0xFF},
|
143
|
{ 59,0x01,0xFF},
|
144
|
{ 60,0x00,0xFF},
|
145
|
{ 61,0x00,0xFF},
|
146
|
{ 62,0x00,0x3F},
|
147
|
{ 63,0x10,0xFF},
|
148
|
{ 64,0x00,0xFF},
|
149
|
{ 65,0x00,0xFF},
|
150
|
{ 66,0x00,0xFF},
|
151
|
{ 67,0x00,0xFF},
|
152
|
{ 68,0x00,0xFF},
|
153
|
{ 69,0x00,0xFF},
|
154
|
{ 70,0x00,0xFF},
|
155
|
{ 71,0x00,0xFF},
|
156
|
{ 72,0x00,0xFF},
|
157
|
{ 73,0x00,0x3F},
|
158
|
{ 74,0x10,0xFF},
|
159
|
{ 75,0x44,0xFF},
|
160
|
{ 76,0x02,0xFF},
|
161
|
{ 77,0x10,0xFF},
|
162
|
{ 78,0x00,0xFF},
|
163
|
{ 79,0x00,0xFF},
|
164
|
{ 80,0x00,0xFF},
|
165
|
{ 81,0x0F,0xFF},
|
166
|
{ 82,0x00,0xFF},
|
167
|
{ 83,0x00,0xFF},
|
168
|
{ 84,0x00,0x3F},
|
169
|
{ 85,0x10,0xFF},
|
170
|
{ 86,0x00,0xFF},
|
171
|
{ 87,0x00,0xFF},
|
172
|
{ 88,0x00,0xFF},
|
173
|
{ 89,0x00,0xFF},
|
174
|
{ 90,0x00,0xFF},
|
175
|
{ 91,0x00,0xFF},
|
176
|
{ 92,0x00,0xFF},
|
177
|
{ 93,0x00,0xFF},
|
178
|
{ 94,0x00,0xFF},
|
179
|
{ 95,0x00,0x3F},
|
180
|
{ 96,0x10,0x00},
|
181
|
{ 97,0x00,0xFF},
|
182
|
{ 98,0x35,0xFF},
|
183
|
{ 99,0x00,0xFF},
|
184
|
{100,0x00,0xFF},
|
185
|
{101,0x00,0xFF},
|
186
|
{102,0x00,0xFF},
|
187
|
{103,0x01,0xFF},
|
188
|
{104,0x00,0xFF},
|
189
|
{105,0x00,0xFF},
|
190
|
{106,0x80,0xBF},
|
191
|
{107,0x00,0xFF},
|
192
|
{108,0x00,0xFF},
|
193
|
{109,0x00,0xFF},
|
194
|
{110,0xC0,0xFF},
|
195
|
{111,0x00,0xFF},
|
196
|
{112,0x00,0xFF},
|
197
|
{113,0x00,0xFF},
|
198
|
{114,0xC0,0xFF},
|
199
|
{115,0x00,0xFF},
|
200
|
{116,0x80,0xFF},
|
201
|
{117,0x00,0xFF},
|
202
|
{118,0xC0,0xFF},
|
203
|
{119,0x00,0xFF},
|
204
|
{120,0x00,0xFF},
|
205
|
{121,0x00,0xFF},
|
206
|
{122,0x40,0xFF},
|
207
|
{123,0x00,0xFF},
|
208
|
{124,0x00,0xFF},
|
209
|
{125,0x00,0xFF},
|
210
|
{126,0x00,0xFF},
|
211
|
{127,0x00,0xFF},
|
212
|
{128,0x00,0xFF},
|
213
|
{129,0x00,0x0F},
|
214
|
{130,0x00,0x0F},
|
215
|
{131,0x00,0xFF},
|
216
|
{132,0x00,0xFF},
|
217
|
{133,0x00,0xFF},
|
218
|
{134,0x00,0xFF},
|
219
|
{135,0x00,0xFF},
|
220
|
{136,0x00,0xFF},
|
221
|
{137,0x00,0xFF},
|
222
|
{138,0x00,0xFF},
|
223
|
{139,0x00,0xFF},
|
224
|
{140,0x00,0xFF},
|
225
|
{141,0x00,0xFF},
|
226
|
{142,0x00,0xFF},
|
227
|
{143,0x00,0xFF},
|
228
|
{144,0x00,0xFF},
|
229
|
{145,0x00,0x00},
|
230
|
{146,0xFF,0x00},
|
231
|
{147,0x00,0x00},
|
232
|
{148,0x00,0x00},
|
233
|
{149,0x00,0x00},
|
234
|
{150,0x00,0x00},
|
235
|
{151,0x00,0x00},
|
236
|
{152,0x00,0xFF},
|
237
|
{153,0x00,0xFF},
|
238
|
{154,0x00,0xFF},
|
239
|
{155,0x00,0xFF},
|
240
|
{156,0x00,0xFF},
|
241
|
{157,0x00,0xFF},
|
242
|
{158,0x00,0x0F},
|
243
|
{159,0x00,0x0F},
|
244
|
{160,0x00,0xFF},
|
245
|
{161,0x00,0xFF},
|
246
|
{162,0x00,0xFF},
|
247
|
{163,0x00,0xFF},
|
248
|
{164,0x00,0xFF},
|
249
|
{165,0x00,0xFF},
|
250
|
{166,0x00,0xFF},
|
251
|
{167,0x00,0xFF},
|
252
|
{168,0x00,0xFF},
|
253
|
{169,0x00,0xFF},
|
254
|
{170,0x00,0xFF},
|
255
|
{171,0x00,0xFF},
|
256
|
{172,0x00,0xFF},
|
257
|
{173,0x00,0xFF},
|
258
|
{174,0x00,0xFF},
|
259
|
{175,0x00,0xFF},
|
260
|
{176,0x00,0xFF},
|
261
|
{177,0x00,0xFF},
|
262
|
{178,0x00,0xFF},
|
263
|
{179,0x00,0xFF},
|
264
|
{180,0x00,0xFF},
|
265
|
{181,0x00,0x0F},
|
266
|
{182,0x00,0xFF},
|
267
|
{183,0x00,0xFF},
|
268
|
{184,0x00,0xFF},
|
269
|
{185,0x00,0xFF},
|
270
|
{186,0x00,0xFF},
|
271
|
{187,0x00,0xFF},
|
272
|
{188,0x00,0xFF},
|
273
|
{189,0x00,0xFF},
|
274
|
{190,0x00,0xFF},
|
275
|
{191,0x00,0xFF},
|
276
|
{192,0x00,0xFF},
|
277
|
{193,0x00,0xFF},
|
278
|
{194,0x00,0xFF},
|
279
|
{195,0x00,0xFF},
|
280
|
{196,0x00,0xFF},
|
281
|
{197,0x00,0xFF},
|
282
|
{198,0x00,0xFF},
|
283
|
{199,0x00,0xFF},
|
284
|
{200,0x00,0xFF},
|
285
|
{201,0x00,0xFF},
|
286
|
{202,0x00,0xFF},
|
287
|
{203,0x00,0x0F},
|
288
|
{204,0x00,0xFF},
|
289
|
{205,0x00,0xFF},
|
290
|
{206,0x00,0xFF},
|
291
|
{207,0x00,0xFF},
|
292
|
{208,0x00,0xFF},
|
293
|
{209,0x00,0xFF},
|
294
|
{210,0x00,0xFF},
|
295
|
{211,0x00,0xFF},
|
296
|
{212,0x00,0xFF},
|
297
|
{213,0x00,0xFF},
|
298
|
{214,0x00,0xFF},
|
299
|
{215,0x00,0xFF},
|
300
|
{216,0x00,0xFF},
|
301
|
{217,0x00,0xFF},
|
302
|
{218,0x00,0x00},
|
303
|
{219,0x00,0x00},
|
304
|
{220,0x00,0x00},
|
305
|
{221,0x0D,0x00},
|
306
|
{222,0x00,0x00},
|
307
|
{223,0x00,0x00},
|
308
|
{224,0xF4,0x00},
|
309
|
{225,0xF0,0x00},
|
310
|
{226,0x00,0x00},
|
311
|
{227,0x00,0x00},
|
312
|
{228,0x00,0x00},
|
313
|
{229,0x00,0x00},
|
314
|
{231,0x00,0x00},
|
315
|
{232,0x00,0x00},
|
316
|
{233,0x00,0x00},
|
317
|
{234,0x00,0x00},
|
318
|
{235,0x00,0x00},
|
319
|
{236,0x00,0x00},
|
320
|
{237,0x00,0x00},
|
321
|
{238,0x14,0x00},
|
322
|
{239,0x00,0x00},
|
323
|
{240,0x00,0x00},
|
324
|
{242,0x02,0x02},
|
325
|
{243,0xF0,0x00},
|
326
|
{244,0x00,0x00},
|
327
|
{245,0x00,0x00},
|
328
|
{247,0x00,0x00},
|
329
|
{248,0x00,0x00},
|
330
|
{249,0xA8,0x00},
|
331
|
{250,0x00,0x00},
|
332
|
{251,0x84,0x00},
|
333
|
{252,0x00,0x00},
|
334
|
{253,0x00,0x00},
|
335
|
{254,0x00,0x00},
|
336
|
{255, 1, 0xFF}, // set page bit to 1
|
337
|
{ 0,0x00,0x00},
|
338
|
{ 1,0x00,0x00},
|
339
|
{ 2,0x00,0x00},
|
340
|
{ 3,0x00,0x00},
|
341
|
{ 4,0x00,0x00},
|
342
|
{ 5,0x00,0x00},
|
343
|
{ 6,0x00,0x00},
|
344
|
{ 7,0x00,0x00},
|
345
|
{ 8,0x00,0x00},
|
346
|
{ 9,0x00,0x00},
|
347
|
{ 10,0x00,0x00},
|
348
|
{ 11,0x00,0x00},
|
349
|
{ 12,0x00,0x00},
|
350
|
{ 13,0x00,0x00},
|
351
|
{ 14,0x00,0x00},
|
352
|
{ 15,0x00,0x00},
|
353
|
{ 16,0x00,0x00},
|
354
|
{ 17,0x01,0x00},
|
355
|
{ 18,0x00,0x00},
|
356
|
{ 19,0x00,0x00},
|
357
|
{ 20,0x90,0x00},
|
358
|
{ 21,0x31,0x00},
|
359
|
{ 22,0x00,0x00},
|
360
|
{ 23,0x00,0x00},
|
361
|
{ 24,0x01,0x00},
|
362
|
{ 25,0x00,0x00},
|
363
|
{ 26,0x00,0x00},
|
364
|
{ 27,0x00,0x00},
|
365
|
{ 28,0x00,0x00},
|
366
|
{ 29,0x00,0x00},
|
367
|
{ 30,0x00,0x00},
|
368
|
{ 31,0x00,0xFF},
|
369
|
{ 32,0x00,0xFF},
|
370
|
{ 33,0x01,0xFF},
|
371
|
{ 34,0x00,0xFF},
|
372
|
{ 35,0x00,0xFF},
|
373
|
{ 36,0x90,0xFF},
|
374
|
{ 37,0x31,0xFF},
|
375
|
{ 38,0x00,0xFF},
|
376
|
{ 39,0x00,0xFF},
|
377
|
{ 40,0x01,0xFF},
|
378
|
{ 41,0x00,0xFF},
|
379
|
{ 42,0x00,0xFF},
|
380
|
{ 43,0x00,0x0F},
|
381
|
{ 44,0x00,0x00},
|
382
|
{ 45,0x00,0x00},
|
383
|
{ 46,0x00,0x00},
|
384
|
{ 47,0x00,0xFF},
|
385
|
{ 48,0x00,0xFF},
|
386
|
{ 49,0x01,0xFF},
|
387
|
{ 50,0x00,0xFF},
|
388
|
{ 51,0x00,0xFF},
|
389
|
{ 52,0x90,0xFF},
|
390
|
{ 53,0x31,0xFF},
|
391
|
{ 54,0x00,0xFF},
|
392
|
{ 55,0x00,0xFF},
|
393
|
{ 56,0x01,0xFF},
|
394
|
{ 57,0x00,0xFF},
|
395
|
{ 58,0x00,0xFF},
|
396
|
{ 59,0x00,0x0F},
|
397
|
{ 60,0x00,0x00},
|
398
|
{ 61,0x00,0x00},
|
399
|
{ 62,0x00,0x00},
|
400
|
{ 63,0x00,0xFF},
|
401
|
{ 64,0x00,0xFF},
|
402
|
{ 65,0x01,0xFF},
|
403
|
{ 66,0x00,0xFF},
|
404
|
{ 67,0x00,0xFF},
|
405
|
{ 68,0x90,0xFF},
|
406
|
{ 69,0x31,0xFF},
|
407
|
{ 70,0x00,0xFF},
|
408
|
{ 71,0x00,0xFF},
|
409
|
{ 72,0x01,0xFF},
|
410
|
{ 73,0x00,0xFF},
|
411
|
{ 74,0x00,0xFF},
|
412
|
{ 75,0x00,0x0F},
|
413
|
{ 76,0x00,0x00},
|
414
|
{ 77,0x00,0x00},
|
415
|
{ 78,0x00,0x00},
|
416
|
{ 79,0x00,0xFF},
|
417
|
{ 80,0x00,0xFF},
|
418
|
{ 81,0x00,0xFF},
|
419
|
{ 82,0x00,0xFF},
|
420
|
{ 83,0x00,0xFF},
|
421
|
{ 84,0x90,0xFF},
|
422
|
{ 85,0x31,0xFF},
|
423
|
{ 86,0x00,0xFF},
|
424
|
{ 87,0x00,0xFF},
|
425
|
{ 88,0x01,0xFF},
|
426
|
{ 89,0x00,0xFF},
|
427
|
{ 90,0x00,0xFF},
|
428
|
{ 91,0x00,0x0F},
|
429
|
{ 92,0x00,0x00},
|
430
|
{ 93,0x00,0x00},
|
431
|
{ 94,0x00,0x00},
|
432
|
{255, 0, 0xFF} }; // set page bit to 0
|
433
|
//End of file
|