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//Register map for use with AN428 (JumpStart)
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//http://www.skyworksinc.com/timing
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//#BEGIN_HEADER
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//Date = Tuesday, July 11, 2023 3:14 PM
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//File version = 3
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//Software Name = ClockBuilder Pro
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//Software version = 4.9.0.0
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//Software date = 4 11, 2023
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//Chip = Si533x
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//Part Number = Si533x
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//#END_HEADER
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//Input Frequency (MHz) = 25.000000000
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//Input Type = Crystal
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//P1 = 1
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//Input Mux = XoClk
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//FDBK Input Frequency (MHz) = 25.000000000
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//FDBK Input Type = OFF
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//P2 = 1
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//FDBK Mux = NoClk
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//PFD Input Frequency (MHz) = 25.000000000
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//VCO Frequency (GHz) = 2.750000
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//N = 110 (110.0000)
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//Internal feedback enabled
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//Output Clock 0
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// Output Frequency (MHz) = 125.000000000
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// Mux Selection = IDn
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// MultiSynth = 22 (22.0000)
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// R = 1
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//Output Clock 1
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// Output is off
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//Output Clock 2
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// Output Frequency (MHz) = 322.265625000
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// Mux Selection = IDn
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// MultiSynth = 8 8/15 (8.5333)
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// R = 1
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//Output Clock 3
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// Output is off
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//Driver 0
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// Enabled
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// Powered on
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// Output voltage = 1.80
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// Output type = 1.8V LVDS
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// Output state when disabled = AlwaysOn
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//Driver 1
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// Disabled
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// Powered off
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// Output voltage = 1.80
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// Output type = 1.8V LVDS
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// Output state when disabled = AlwaysOn
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//Driver 2
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// Enabled
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// Powered on
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// Output voltage = 1.80
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// Output type = 1.8V LVDS
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// Output state when disabled = AlwaysOn
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//Driver 3
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// Disabled
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// Powered off
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// Output voltage = 3.30
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// Output type = 3.3V LVDS
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// Output state when disabled = StopLow
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//Clock 0 phase inc/dec step size (ns) = 0.000
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//Clock 1 phase inc/dec step size (ns) = 0.000
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//Clock 2 phase inc/dec step size (ns) = 0.000
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//Clock 3 phase inc/dec step size (ns) = 0.000
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//Phase increment and decrement pin control is off
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//Frequency increment and decrement pin control is off
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//Frequency increment and decrement is disabled
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//Initial phase offset 0 (ns) = 0.000
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//Initial phase offset 1 (ns) = 0.000
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//Initial phase offset 2 (ns) = 0.000
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//Initial phase offset 3 (ns) = 0.000
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//SSC is disabled
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#define NUM_REGS_MAX 350
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typedef struct Reg_Data{
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unsigned char Reg_Addr;
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unsigned char Reg_Val;
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unsigned char Reg_Mask;
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} Reg_Data;
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Reg_Data const code Reg_Store[NUM_REGS_MAX] = {
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{ 0,0x00,0x00},
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{ 1,0x00,0x00},
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{ 2,0x00,0x00},
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{ 3,0x00,0x00},
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{ 4,0x00,0x00},
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{ 5,0x00,0x00},
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{ 6,0x08,0x1D},
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{ 7,0x00,0x00},
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{ 8,0x70,0x00},
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{ 9,0x0F,0x00},
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{ 10,0x00,0x00},
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{ 11,0x00,0x00},
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{ 12,0x00,0x00},
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{ 13,0x00,0x00},
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{ 14,0x00,0x00},
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{ 15,0x00,0x00},
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{ 16,0x00,0x00},
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{ 17,0x00,0x00},
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{ 18,0x00,0x00},
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{ 19,0x00,0x00},
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{ 20,0x00,0x00},
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{ 21,0x00,0x00},
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{ 22,0x00,0x00},
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{ 23,0x00,0x00},
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{ 24,0x00,0x00},
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{ 25,0x00,0x00},
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{ 26,0x00,0x00},
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{ 27,0xF1,0x80},
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{ 28,0x16,0xFF},
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{ 29,0x90,0xFF},
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{ 30,0xB0,0xFF},
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{ 31,0xC0,0xFF},
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{ 32,0xE3,0xFF},
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{ 33,0xC0,0xFF},
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{ 34,0xE3,0xFF},
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{ 35,0x2A,0xFF},
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{ 36,0x06,0x1F},
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{ 37,0x00,0x1F},
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{ 38,0x06,0x1F},
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{ 39,0x00,0x1F},
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{ 40,0x84,0xFF},
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{ 41,0x10,0x7F},
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{ 42,0x23,0x3F},
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{ 43,0x00,0x00},
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{ 44,0x00,0x00},
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{ 45,0x00,0xFF},
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{ 46,0x00,0xFF},
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{ 47,0x14,0x3F},
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{ 48,0x30,0xFF},
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{ 49,0x00,0xFF},
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{ 50,0xC2,0xFF},
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{ 51,0x07,0xFF},
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{ 52,0x10,0xFF},
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{ 53,0x00,0xFF},
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{ 54,0x09,0xFF},
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{ 55,0x00,0xFF},
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{ 56,0x00,0xFF},
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{ 57,0x00,0xFF},
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{ 58,0x00,0xFF},
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{ 59,0x01,0xFF},
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{ 60,0x00,0xFF},
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{ 61,0x00,0xFF},
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{ 62,0x00,0x3F},
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{ 63,0x10,0xFF},
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{ 64,0x00,0xFF},
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{ 65,0x00,0xFF},
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{ 66,0x00,0xFF},
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{ 67,0x00,0xFF},
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{ 68,0x00,0xFF},
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{ 69,0x00,0xFF},
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{ 70,0x00,0xFF},
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{ 71,0x00,0xFF},
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{ 72,0x00,0xFF},
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{ 73,0x00,0x3F},
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{ 74,0x10,0xFF},
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{ 75,0x44,0xFF},
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{ 76,0x02,0xFF},
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{ 77,0x10,0xFF},
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{ 78,0x00,0xFF},
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{ 79,0x00,0xFF},
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{ 80,0x00,0xFF},
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{ 81,0x0F,0xFF},
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{ 82,0x00,0xFF},
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{ 83,0x00,0xFF},
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{ 84,0x00,0x3F},
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{ 85,0x10,0xFF},
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{ 86,0x00,0xFF},
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{ 87,0x00,0xFF},
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{ 88,0x00,0xFF},
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{ 89,0x00,0xFF},
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{ 90,0x00,0xFF},
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{ 91,0x00,0xFF},
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{ 92,0x00,0xFF},
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{ 93,0x00,0xFF},
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{ 94,0x00,0xFF},
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{ 95,0x00,0x3F},
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{ 96,0x10,0x00},
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{ 97,0x00,0xFF},
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{ 98,0x35,0xFF},
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{ 99,0x00,0xFF},
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{100,0x00,0xFF},
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{101,0x00,0xFF},
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{102,0x00,0xFF},
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{103,0x01,0xFF},
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{104,0x00,0xFF},
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{105,0x00,0xFF},
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{106,0x80,0xBF},
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{107,0x00,0xFF},
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{108,0x00,0xFF},
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{109,0x00,0xFF},
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{110,0xC0,0xFF},
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{111,0x00,0xFF},
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{112,0x00,0xFF},
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{113,0x00,0xFF},
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{114,0xC0,0xFF},
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{115,0x00,0xFF},
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{116,0x80,0xFF},
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{117,0x00,0xFF},
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{118,0xC0,0xFF},
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{119,0x00,0xFF},
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{120,0x00,0xFF},
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{121,0x00,0xFF},
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{122,0x40,0xFF},
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{123,0x00,0xFF},
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{124,0x00,0xFF},
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{125,0x00,0xFF},
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{126,0x00,0xFF},
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{127,0x00,0xFF},
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{128,0x00,0xFF},
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{129,0x00,0x0F},
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{130,0x00,0x0F},
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{131,0x00,0xFF},
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{132,0x00,0xFF},
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{133,0x00,0xFF},
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{134,0x00,0xFF},
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{135,0x00,0xFF},
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{136,0x00,0xFF},
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{137,0x00,0xFF},
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{138,0x00,0xFF},
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{139,0x00,0xFF},
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{140,0x00,0xFF},
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{141,0x00,0xFF},
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{142,0x00,0xFF},
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{143,0x00,0xFF},
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{144,0x00,0xFF},
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{145,0x00,0x00},
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{146,0xFF,0x00},
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{147,0x00,0x00},
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{148,0x00,0x00},
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{149,0x00,0x00},
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{150,0x00,0x00},
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{151,0x00,0x00},
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{152,0x00,0xFF},
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{153,0x00,0xFF},
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{154,0x00,0xFF},
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{155,0x00,0xFF},
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{156,0x00,0xFF},
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{157,0x00,0xFF},
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{158,0x00,0x0F},
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{159,0x00,0x0F},
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{160,0x00,0xFF},
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{161,0x00,0xFF},
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{162,0x00,0xFF},
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{163,0x00,0xFF},
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{164,0x00,0xFF},
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{165,0x00,0xFF},
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{166,0x00,0xFF},
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{167,0x00,0xFF},
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{168,0x00,0xFF},
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{169,0x00,0xFF},
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{170,0x00,0xFF},
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{171,0x00,0xFF},
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{172,0x00,0xFF},
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{173,0x00,0xFF},
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{174,0x00,0xFF},
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{175,0x00,0xFF},
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{176,0x00,0xFF},
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{177,0x00,0xFF},
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{178,0x00,0xFF},
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{179,0x00,0xFF},
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{180,0x00,0xFF},
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{181,0x00,0x0F},
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{182,0x00,0xFF},
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{183,0x00,0xFF},
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{184,0x00,0xFF},
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{185,0x00,0xFF},
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{186,0x00,0xFF},
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{187,0x00,0xFF},
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{188,0x00,0xFF},
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{189,0x00,0xFF},
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{190,0x00,0xFF},
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{191,0x00,0xFF},
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{192,0x00,0xFF},
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{193,0x00,0xFF},
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{194,0x00,0xFF},
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{195,0x00,0xFF},
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{196,0x00,0xFF},
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{197,0x00,0xFF},
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{198,0x00,0xFF},
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{199,0x00,0xFF},
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{200,0x00,0xFF},
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{201,0x00,0xFF},
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{202,0x00,0xFF},
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{203,0x00,0x0F},
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{204,0x00,0xFF},
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{205,0x00,0xFF},
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{206,0x00,0xFF},
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{207,0x00,0xFF},
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{208,0x00,0xFF},
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{209,0x00,0xFF},
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{210,0x00,0xFF},
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{211,0x00,0xFF},
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{212,0x00,0xFF},
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{213,0x00,0xFF},
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{214,0x00,0xFF},
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{215,0x00,0xFF},
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{216,0x00,0xFF},
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{217,0x00,0xFF},
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{218,0x00,0x00},
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{219,0x00,0x00},
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{220,0x00,0x00},
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{221,0x0D,0x00},
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{222,0x00,0x00},
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{223,0x00,0x00},
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{224,0xF4,0x00},
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{225,0xF0,0x00},
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{226,0x00,0x00},
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{227,0x00,0x00},
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{228,0x00,0x00},
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{229,0x00,0x00},
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{231,0x00,0x00},
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{232,0x00,0x00},
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{233,0x00,0x00},
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{234,0x00,0x00},
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{235,0x00,0x00},
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{236,0x00,0x00},
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{237,0x00,0x00},
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{238,0x14,0x00},
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{239,0x00,0x00},
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{240,0x00,0x00},
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{242,0x02,0x02},
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{243,0xF0,0x00},
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{244,0x00,0x00},
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{245,0x00,0x00},
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{247,0x00,0x00},
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{248,0x00,0x00},
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{249,0xA8,0x00},
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{250,0x00,0x00},
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{251,0x84,0x00},
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{252,0x00,0x00},
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{253,0x00,0x00},
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{254,0x00,0x00},
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{255, 1, 0xFF}, // set page bit to 1
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{ 0,0x00,0x00},
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{ 1,0x00,0x00},
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{ 2,0x00,0x00},
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{ 3,0x00,0x00},
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{ 4,0x00,0x00},
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{ 5,0x00,0x00},
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{ 6,0x00,0x00},
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{ 7,0x00,0x00},
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{ 8,0x00,0x00},
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{ 9,0x00,0x00},
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{ 10,0x00,0x00},
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{ 11,0x00,0x00},
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{ 12,0x00,0x00},
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{ 13,0x00,0x00},
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{ 14,0x00,0x00},
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{ 15,0x00,0x00},
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{ 16,0x00,0x00},
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{ 17,0x01,0x00},
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{ 18,0x00,0x00},
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{ 19,0x00,0x00},
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{ 20,0x90,0x00},
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{ 21,0x31,0x00},
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{ 22,0x00,0x00},
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{ 23,0x00,0x00},
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{ 24,0x01,0x00},
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{ 25,0x00,0x00},
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{ 26,0x00,0x00},
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{ 27,0x00,0x00},
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{ 28,0x00,0x00},
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{ 29,0x00,0x00},
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{ 30,0x00,0x00},
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{ 31,0x00,0xFF},
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{ 32,0x00,0xFF},
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{ 33,0x01,0xFF},
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{ 34,0x00,0xFF},
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{ 35,0x00,0xFF},
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{ 36,0x90,0xFF},
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{ 37,0x31,0xFF},
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{ 38,0x00,0xFF},
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{ 39,0x00,0xFF},
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{ 40,0x01,0xFF},
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{ 41,0x00,0xFF},
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{ 42,0x00,0xFF},
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{ 43,0x00,0x0F},
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{ 44,0x00,0x00},
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{ 45,0x00,0x00},
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{ 46,0x00,0x00},
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{ 47,0x00,0xFF},
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{ 48,0x00,0xFF},
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{ 49,0x01,0xFF},
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{ 50,0x00,0xFF},
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{ 51,0x00,0xFF},
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{ 52,0x90,0xFF},
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{ 53,0x31,0xFF},
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{ 54,0x00,0xFF},
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{ 55,0x00,0xFF},
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{ 56,0x01,0xFF},
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{ 57,0x00,0xFF},
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{ 58,0x00,0xFF},
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{ 59,0x00,0x0F},
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{ 60,0x00,0x00},
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{ 61,0x00,0x00},
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{ 62,0x00,0x00},
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{ 63,0x00,0xFF},
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{ 64,0x00,0xFF},
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{ 65,0x01,0xFF},
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{ 66,0x00,0xFF},
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{ 67,0x00,0xFF},
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{ 68,0x90,0xFF},
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{ 69,0x31,0xFF},
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{ 70,0x00,0xFF},
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{ 71,0x00,0xFF},
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{ 72,0x01,0xFF},
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{ 73,0x00,0xFF},
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{ 74,0x00,0xFF},
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{ 75,0x00,0x0F},
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{ 76,0x00,0x00},
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{ 77,0x00,0x00},
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{ 78,0x00,0x00},
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{ 79,0x00,0xFF},
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{ 80,0x00,0xFF},
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{ 81,0x00,0xFF},
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{ 82,0x00,0xFF},
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{ 83,0x00,0xFF},
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{ 84,0x90,0xFF},
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{ 85,0x31,0xFF},
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{ 86,0x00,0xFF},
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{ 87,0x00,0xFF},
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{ 88,0x01,0xFF},
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{ 89,0x00,0xFF},
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{ 90,0x00,0xFF},
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{ 91,0x00,0x0F},
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{ 92,0x00,0x00},
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{ 93,0x00,0x00},
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{ 94,0x00,0x00},
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{255, 0, 0xFF} }; // set page bit to 0
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//End of file
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