Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

Hi Jose,

I'm going to need a bit more info to help you get further. Can you provide your full console log? Also is the ubootenv you provided a copy and pasted from the uBootMMCEnv.txt file or is it the print out of running "print env" from u-boot? If it's a copy and paste from the text file could you also provide the output of running "print env" in your console log.

Thank you!
Dan

Hey Daniel,
Thanks for the help.

This is the full log:

U-Boot SPL 2013.01.01 (Nov 17 2021 - 15:25:35)
BOARD : Critical Link MitySOM-5CSx Module
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 800 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 50000 KHz
CLOCK: QSPI clock 400000 KHz
RESET: COLD
INFO : Watchdog enabled
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 1024 MiB
SDRAM: Initializing SDRAM ECC
SDRAM: ECC initialized successfully with 1510 ms
SDRAM: ECC Enabled
ALTERA DWMMC: 0

U-Boot 2013.01.01 (Nov 17 2021 - 15:27:31) Critical Link MitySOM-5CSx

CPU : Altera SOCFPGA Platform
BOARD : Critical Link MitySOM-5CSx Module
I2C: ready
DRAM: 1 GiB
MMC: ALTERA DWMMC: 0
In: serial
Out: serial
Err: serial
Info - Didn't find block
Net: mii0
gpio: pin 0 (bank/mask = 0/0x00000001)
(gpio 0) value is 1
Hit any key to stop autoboot: 0
*Bad partition specification mmc 0:3
*Bad partition specification mmc 0:3
" not definedcloadfpga
" not definedcboot

I posted the UbootEnv.txt file. This is the print env output.

MitySOM-5CSx # printenv
autoload=no
axibridge=ffd0501c
axibridge_handoff=0x00000004
baudrate=115200
bootargs=console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait
bootcmd=run mmcload; run mmcboot
bootdelay=5
bridge_disable=mw $fpgaintf 0; mw $fpga2sdram 0; go $fpga2sdram_apply; mw $axibr
idge 0; mw $l3remap 0x1
bridge_enable_handoff=mw $fpgaintf ${fpgaintf_handoff}; go $fpga2sdram_apply; mw
$fpga2sdram ${fpga2sdram_handoff}; mw $axibridge ${axibridge_handoff}; mw $l3re
map ${l3remap_handoff}
clmodelnum=5CSX-H6-42A-RC
ethact=mii0
ethaddr=c4:ff:bc:70:41:48
fpga=0
fpga2sdram=ffc25080
fpga2sdram_apply=3ff75598
fpga2sdram_handoff=0x00000000
fpgaintf=ffd08028
fpgaintf_handoff=0x00000000
fpgaload=run bridge_disable;fpga load 0 ${loadfpgaaddr} ${loadfpgasize}; run bri
dge_enable_handoff
l3remap=ff800000
l3remap_handoff=0x00000019
loadfdtaddr=0x00000100
loadfpgaaddr=0x2000000
loadfpgasize=0x700000
loadinitramfsaddr=0x3000000
loadkerneladdr=0xA000
mmcboot=run mmcsetbootargs;run fpgaload;bootz ${loadkerneladdr} - ${loadfdtaddr}
mmcextpart=3
mmcfatpart=1
mmcfdtloc=/boot/socfpga_mitysom5csx_devkit.dtb
mmcfpgaloc=/dev_5cs.rbf
mmckernelloc=/boot/zImage
mmcload=mmc rescan;run mmcloadkernel;run mmcloadfdt;run mmcloadfpga
mmcloadfdt=ext2load mmc 0:${mmcextpart} ${loadfdtaddr} ${mmcfdtloc}
mmcloadfpga=fatload mmc 0:${mmcfatpart} ${loadfpgaaddr} ${mmcfpgaloc}
mmcloadkernel=ext2load mmc 0:${mmcextpart} ${loadkerneladdr} ${mmckernelloc}
mmcloadpart=2
mmcroot=/dev/mmcblk0p3
mmcsetbootargs=setenv bootargs console=ttyS0,115200 root=${mmcroot} rw rootwait
preboot=run setup_usb; ab1805 cs ${rtccal}
qspiboot=run qspisetbootargs;run fpgaload;bootz ${loadkerneladdr} ${loadinitramf
saddr} ${loadfdtaddr}
qspifdtloc=0x50000
qspifdtsize=0x6000
qspifpgaloc=0x8E0000
qspiinitfsramloc=0x0
qspiinitfsramsize=0x1000000
qspikernelloc=0xe0000
qspikernelsize=0x600000
qspiload=run qspiloadkernel;run qspiloadfdt;run qspiloadfpga;run qspiloadinitram
fs
qspiloadfdt=sf probe 0; sf read ${loadfdtaddr} ${qspifdtloc} ${qspifdtsize}
qspiloadfpga=sf probe 0; sf read ${loadfpgaaddr} ${qspifpgaloc} ${loadfpgasize}
qspiloadinitramfs=sf probe 1; sf read ${loadinitramfsaddr} ${qspiinitfsramloc} $ {qspiinitfsramsize}
qspiloadkernel=sf probe 0; sf read ${loadkerneladdr} ${qspikernelloc} ${qspikern
elsize}
qspisetbootargs=setenv bootargs console=ttyS0,115200 root=/dev/ram0
rtccal=0
setup_usb=gpio set 0
stderr=serial
stdin=serial
stdout=serial
verify=n

Environment size: 2567/4092 bytes

-Jose

Hi Jose,

I think your U-Boot environment may have become corrupted somehow: the "bad partition specification" error can occur when the partition number doesn't parse correctly. Since it looks right in the error message, I suspect there may be invisible control characters in the mmcextpart variable.

You'll most likely need to reflash your SD card (or at least the U-Boot environment: Building_sd_181). It looks like you're using our stock U-Boot environment, so I'm attaching a known-good ubootenv.bin you can use for reflashing.

If you were editing environment variables at all from U-Boot (with editenv or setenv), this could also have happened by hitting a key U-Boot doesn't handle well (e.g., the function keys).

Zach

Hey Zach,
Thanks for the ubootenv.bin file, that seem to have done the trick and I was able to load the fpga image. I seem to have issues with the kernel though.

The console freezes at the end and Yocto never loads. I am using the mitysom-image-base-mitysom-c5.tar.gz provided on the website.

Console Log:
U-Boot 2013.01.01 (Dec 02 2021 - 17:38:31) Critical Link MitySOM-5CSx

CPU : Altera SOCFPGA Platform
BOARD : Critical Link MitySOM-5CSx Module
I2C: ready
DRAM: 1 GiB
MMC: ALTERA DWMMC: 0
In: serial
Out: serial
Err: serial
Net: mii0
gpio: pin 0 (bank/mask = 0/0x00000001)
gpio: pin 0 (gpio 0) value is 1
Hit any key to stop autoboot: 0
4078608 bytes read in 235 ms (16.6 MiB/s)
21795 bytes read in 36 ms (590.8 KiB/s)
reading /dev_5cs.rbf
7007204 bytes read in 330 ms (20.2 MiB/s)

1. Starting application at 0x3FF75598 ...
2. Application terminated, rc = 0x0
3. Starting application at 0x3FF75598 ...
4. Application terminated, rc = 0x0
5. Flattened Device Tree blob at 00000100
   Booting using the fdt blob at 0x00000100
   Loading Device Tree to 03ff7000, end 03fff522 ... OK

Starting kernel ...

Great, I'm glad that helped!

Is "starting kernel" as far as it boots? As a quick sanity check, could you try flashing a fresh SD card from the pre-built image on our wiki? There are download links here: wiki (based on your U-Boot environment, it looks like you want the "5CSX-H6-42A SD Card" link).

Assuming that works, we should be able to work backward and figure out what piece is causing the issue. Could you please also describe your build setup a bit? Namely:

1. Are you on Windows or Linux?
2. What version of Quartus are you using?
3. What components of the SD card have you rebuilt (preloader, U-Boot, FPGA)?

Hey Zachary,
Thanks for your help. Yes, that's as far as it goes. I flashed on a different SD Card and it has the same issue. Also, I can flash it with a working SD card img from criticalLink and that one loads.

Answering your questions:
1) I use the xubuntu VM given by criticalLink to run build the preloader and uboot and run the make_sd.sh script. I use Windows to work on Quartus and use the bsp-editor for the handoff, and I use Win32DiskImager to load the image to the SD Card.
2) I am using Quartus 18.1
3) I rebuilt the fpga and added a 32 bit lwbridge and an 128-bit AXI bus to the HPS,
plus the U-boot and preloader following https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Building_uboot_181. Maybe I miss something given that I changed the HPS?

-Jose

Hi Jose,

Thanks for the info. When you rebuilt your SD card image, you included your all three of your new preloader, U-Boot, and FPGA, correct? If there's a mismatch between those three binaries it can cause the kernel to hang like this, particularly when the bridges to the HPS have been changed.

As another sanity check, when it gets to trying to boot the kernel, does the yellow LED on the SOM turn off? (There should still be a green LED next to it that stays on.) Based on your log, I expect the yellow LED to turn off, but if it doesn't, then the FPGA isn't loading properly (which could also cause this hang).

Would it also be possible to zip up your SD card image that hangs and post it here for us to take a look?

Zach

Hey Zach,
I included all three in the SD Card when I rebuild the SD Card. Also, the SOM yellow LED turns off and the green LED turns on.

Sure, I can do that. I am including a zip file with the SD Card Image and the individual files and the make_sd.sh script used.

-Jose

Hi Jose,

The issue is device tree nodes for FPGA peripherals that don't exist in your FPGA. As a quick-fix, I'm attaching a precompiled device tree you can include in the filesystem to make your SD card boot. You'll want put the device tree in your build location at the path overlay/boot/socfpga_mitysom5csx_devkit.dtb. Then when you run make_sd.sh, add the options -r overlay. So for example the full command would be:

./make_sd.sh -d CycloneV -p preloader-mkpimage.bin -u u-boot.img -e ubootenv.bin -f dev_5cs.rbf -r overlay mitysom-image-base-mitysom-c5.tar.gz

---

To recompile the device tree yourself, you can follow the instructions here: Building_kernel_181. Before building the device trees, you'll need to change four lines in arch/arm/boot/dts/socfpga_mitysom5csx_devkit.dts: either delete or comment out the status = "okay"; lines for the &can0, &can1, &hps_lw_bus, and &gmac1 blocks. I'm also attaching this file with the required changes.

Hey Zach,
Thanks for your reply! That worked. I was under the impression I only needed to rebuild the Preloader and U-boot if I changed the HPS.
Thanks for clarifying that.

-Jose