Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

Hi John,

Thank you, happy (belated) Holidays to you as well! I appreciate your patience for a response as I was out of office. Glad you were able to rebuild the device tree and get the RGB scripts to work.

I went ahead and took a look into the adapter board you linked and it seems like you should be able to probe everything in Bank 2 with the header and then use debug LEDs on the adapter to observe changes on everything in Bank 3 of the partial HSMC. PIO3 is actually only 3 bits wide on your SOM, so the two additional pins you found are the two remaining on that bus. PIO0-2 are all 32 bits wide (4 bytes), making up the bulk of the remaining pins you're looking to test. Looking at the schematic you attached for the adapter (thank you for that), you should be able to directly map it to the partial HSMC connector (J301) in this schematic and figure out which bit of which bus each pin connects to with relative ease. Once you figure out what pin connects to what in our schematic I linked, you can search that net name in the top level .vhd file (dev_5cs_top.vhd) and figure out the bit of which bus you would need to toggle to observe a change. For example, pin 41 of the HSMC connector runs to HSMC2_D1_P on our schematic, and in the top level file, you'll find this: pio_2_export(30) => HSMC2_D1_P. This means it's connected to bus 2, bit 30 (0 indexed). On your adapter, pin 41 is connected to HSM_D0. So, if you toggle bit 30 of bus 2, you should observe a voltage change on the header pin connected to HSM_D0.

As for toggling the bits, your procedure it mostly correct. I would ensure you only toggle the bits you want. Right now, you're setting the register contents equal to 0xff which sets 8 bits high while you only want to use 3 bits. HSM_8, HSM_6, and HSM_4 correspond to bits 0, 1, and 2 respectively (was determined using the method above). So, instead of 0xff, you could use 0x7 to set just the lowest 3 bits. Aside from this, you should be able to use this same method with memtool to test PIO0-2, just ensure you use the memory offsets for the right bus (they are noted at the bottom here). So for PIO 2, you would use 0xFF200060. Then, just set the proper bit high at 0xFF200064 to make the pin an output and then set the same bit high at 0xFF200060 to set it high (for bit 30 in the example above, the hex would be 0x40000000).

It is quite tedious to trace back through schematics but hopefully this brief explanation will make it a bit less tedious for you! As for additional docs for details on the GPIO structure, take a look at this. The entirety of section 25 of this page should give a good run down on PIO as well as the register map, which I linked directly to.

I hope this helps, if you have any troubles, questions, or comments, please let us know and we'll get back to you ASAP.

All the best, Seth

Hi Seth,
I'll take a look. Also, I get a page load error with the 1st link :
https://svnsrv.syr.criticallink.com/svn/production/Current/80-Assemblies/80-000578RC-11_RevA%20MitySOM-5CSx%20Dev%20Board%20PCA/80-000578RC-11_RevA_SCH.PDF#page=6

This site can’t be reached
Check if there is a typo in svnsrv.syr.criticallink.com.
DNS_PROBE_FINISHED_NXDOMAIN

John

I have this schematic...
80-000578RC-10_SCH_RevB.PDF

Hi John,

Apologies, I believe I sent you an internal link. The schematic you have is correct and has the same connections for the HSMC connectors. They can be found on page 6. Hope this helps, apologies once again for any confusion!

All the best, Seth