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hps_sybsys.qsys not getting validated in platform Designer and Quartus hanging

Added by Eleonora Haralanova 2 days ago

Hello,
I downloaded the Example projects for Quartus Pro 25.3, copied and renamed the base project and just tried to compile without any changes. I didn't even open the qsys. Quartus first validated a5e.qsys and then moved to validate hps_sybsys.qsys, but is stuck now at that step. It's been and hour now since the start of the compilation. No error shows up, just the spinning wheel with the time increasing.
I copied the project and renamed it again, opened another instance of Quartus and opened the project. I tried opening just the hps_sybsys.qsys, but now the Platform Design is stuck in trying to open.
Any suggestions on how to go pass this?
Bellow is all that Quartus message window shows when it got stuck during validation.

Thank you,
Eleonora

Info: ***********************************************************
Info: Running Quartus Prime IP Generation Tool
Info: Version 25.3.0 Build 109 09/24/2025 SC Pro Edition
Info: Processing started: Thu Jan 15 10:19:53 2026
Info: System process ID: 10616
Info: Command: quartus_ipgenerate a5e -c a5e --run_default_mode_op
Info: Found 14 IP file(s) in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/a5e.qsys was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/hps_subsys.qsys was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_intel_agilex_5_soc_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_emif_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_lwhps2fpga_clock_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_lwhps2fpga_reset_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_lwhps2fpga_mm_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_reset_release.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_fabric_reset_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_gts_rst_seq_left.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_sysid_qsys_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_pio_outputs_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_pio_inputs_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_fan_ctrl_0.ip was found in the project.
Info: Started running qsys-validate on Platform Designer system a5e.qsys
Info: Performing Platform Designer system validation using the command line: c:/altera_pro/25.3/quartus/../qsys/bin/qsys-validate.exe {--search-path=../../../custom_ip/**/*,custom_ip/**/*,$} a5e.qsys
Info: ***********************************************************
Info: Running Quartus Prime IP Generation Tool
Info: Version 25.3.0 Build 109 09/24/2025 SC Pro Edition
Info: Processing started: Thu Jan 15 10:19:53 2026
Info: System process ID: 10616
Info: Command: quartus_ipgenerate a5e -c a5e --run_default_mode_op
Info: Found 14 IP file(s) in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/a5e.qsys was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/hps_subsys.qsys was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_intel_agilex_5_soc_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_emif_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_lwhps2fpga_clock_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_lwhps2fpga_reset_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/hps_subsys/hps_subsys_lwhps2fpga_mm_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_reset_release.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_fabric_reset_bridge_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_gts_rst_seq_left.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_sysid_qsys_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_pio_outputs_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_pio_inputs_0.ip was found in the project.
Info: IP file C:/projects/MytiSOM_25_3/mitysbc-a5-ref/A5ED-B96-C7F-RC-SBC-X/mitysbca5eref_base_1/ip/a5e/a5e_fan_ctrl_0.ip was found in the project.
Info: Started running qsys-validate on Platform Designer system a5e.qsys
Info: Performing Platform Designer system validation using the command line: c:/altera_pro/25.3/quartus/../qsys/bin/qsys-validate.exe {--search-path=../../../custom_ip/**/*,custom_ip/**/*,$} a5e.qsys
Info: a5e: All Generic Component instances match their respective ip files.
Info: Finished running qsys-validate on Platform Designer system a5e.qsys
Info: Started running qsys-validate on Platform Designer system hps_subsys.qsys
Info: Performing Platform Designer system validation using the command line: c:/altera_pro/25.3/quartus/../qsys/bin/qsys-validate.exe {--search-path=../../../custom_ip/**/*,custom_ip/**/*,$} hps_subsys.qsys


Replies (2)

RE: hps_sybsys.qsys not getting validated in platform Designer and Quartus hanging - Added by Michael Williamson 2 days ago

Hi Eleonora,

There was a major bug in quartus related to timestamps in January (starting 1/10). You likely need to apply a patch for this to be resolved.

See this link:

https://community.altera.com/kb/knowledge-base/why-do-i-unexpectedly-observe-intermittent-ddm-errors/349714

With regards,
Mike

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