Activity
From 04/30/2015 to 05/29/2015
05/29/2015
- AL 07:27 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- Hi Mike,
Thanks for all the support. I've managed to solve the problem by downloading the 5CSX Project once again, downloading a new U-Boot version and adding the board specific files to U-Boot and compiling everything again. I still ... - MW 06:53 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- I am checking with our hardware guy here but I don't think the MPU rate is altered by the BOOTSEL pins after u-Boot.
I think the MPU rate is configured in the QSYS HPS configuration setup and the PLL settings are passed via headers to... - FR 03:31 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HSMC1 pinout
- Alex,
thank you for clearing that up!
B) Just for the record, SMC1_SMSDA should be SoM pin 54 and HSMC1_SMSCL should be SoM pin 52.
C) Yes, the usage of those pins is quasi-static, they form part of a 9 bit configuration interfa...
05/28/2015
- AL 11:32 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- Hi Mike,
I have tested it with the image that is available here: http://support.criticallink.com/files/mitysom-5csx/sd_image_MitySOM-5CSX_rev3A.zip.
The Ethernet link appears to be 100Mbps as well.
I hadn't notice the different c... - MW 10:19 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- Hi,
We are not aware of any problem until your post. We had tried to reproduces this problem after you originally posted and didn't see the issue. Sorry I did not mention it. I have asked the engineer to re-run it and capture the re... - AL 10:01 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- I just want to report that this problem is _not_ present when using an Altera Cyclone V DevKit.
I have no problem with the PHY when booting from QSPI flash and I am able to obtain an IP address via DHCP and load a Linux Kernel via TFTP... - AL 09:00 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- Hi Mike,
Thanks for replying. The U-Boot environments are identical. The driver should also be there as I have just noticed, after several attempts, that someties U-Boot does manage to find the interface (although it doesn't work prop... - MW 07:28 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- Sorry,
The only thing that comes to mind is if somehow the uBoot environment has changed or the SPL build removed the phylib or emac driver. You might compare the printenv's from both configurations a little closer. You might also m... - AL 06:08 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PHY not working with QSPI flash boot
- Any ideas of what the problem might be?
Can somebody at least reproduce this behavior?
- AB 11:08 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HSMC1 pinout
- Floria,
A) We confirmed that the .tcl script is in fact incorrect for that pin-assignment.
Correct pin assignment (as you noted): - AL 04:30 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PCI-e Intel - System crash
- It's a total freeze, no dumps are written. Guess the only option is to use the DS-5 Kernel/Device Drivers debug capabilities.
Any other ideas?
Thanks,
Alex
05/27/2015
- AL 09:38 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PCI-e Intel - System crash
- I don't seem to get any oops or panic, it just hangs. I'm attaching the output of dmesg up to the point where the system crashes
(this is for Critical Link's image, i.e. 3.12.0). To get a proper dump I'll need to re-compile the kernel ... - MW 08:36 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: PCI-e Intel - System crash
- Can you dump out the kernel messages (oops? panic? dmesg?)?
-Mike
- Hello,
I am trying to get the PCI-e interface on the MitySoM DevKit (RC-3C version) to work with an Intel 82574L Gigabit Network card
(the same that is used at the RocketBoards example).
I have tried to use both the pre-compiled im...
05/26/2015
- Hi,
I am using the "mityarm_5csx_dev_board_hsmc_setup.tcl":https://support.criticallink.com/redmine/boards/47/topics/3348?r=3352#message-3352 to define the pinout of the HSMC1 interface of my FPGA design, and found a discrepancy in th...
05/22/2015
- BK 07:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Alex,
The NOR flash option does work, although its a bit slower we will still go with this option to load the software.
We are still obliged to use NAND flash for other uses, so we would like to still pursue this problem. At the mom...
05/20/2015
- AB 11:27 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Bruce,
I am working with our team here to determine the best way we can assist you further with this issue/request.
I did want to check concerning the NOR memory option, did that end up not working for you?
Thanks,
Alex - Hi,
I am trying to set up the MitySOM such that U-Boot is stored on the flash memory and the Linux Kernel, DTS and FPGA image are loaded via TFTP.
Whenever I boot from the SD card with a preloader and U-boot compiled according to the...
05/19/2015
- BK 10:14 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Jonathon,
In this thread you suggested that uBoot has a error detection mechanism but it requires a re-build to enable it.
As I mentioned we are not setup to build uBoot, is it possible that you folks could provide a uBoot executable... - AL 03:30 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Boot configuration jumpers
- Thank you very much. As I've seen the labeling is to the right of the switch (in my case), hence I didn't pay attention to it. Also, what I wrote should obviously read 101 = 0x5: 3.3 V SD/MMC, lack of sleep does that.
Best,
Alexandre
05/18/2015
- AD 11:30 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Boot configuration jumpers
- Sorry this isn't clear. There is silkscreen labeling below the switch corresponding to the switch locations 1-10: MSEL[0-4], CSEL[0-1], BSEL[0-2]. CSEL is Clock Select and BSEL is Boot Select. The QSPI interface is running at 1.8V and...
- Hi,
Can someone please shed me some light on the boot configuration jumpers of the MitySOM-5CSX Dev-Kit? On the datasheet it simply says:
_"The MitySOM-5CSX Development Kits default boot configuration mode is shown in Figure 3 below....
05/14/2015
- AB 04:04 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Bruce,
The architecture for the SPI NOR is accurate.
Ideally you would use the 7MB of space starting at 0x100000 for your images. The reserved space starting at 0x600000 is not used for anything and can be used for user files.
H... - JC 01:14 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- We have u-boot use the "MityDSP l138 Config" area to store the settings set by the config command. Its used to determine which devices to setup: mmc, lcd, etc. Should not be overridden without modifying u-boot to not require the config...
- BK 11:42 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Alex,
Thanks for your reply.
We will continue to try and reproduce the problem here.
In the meantime we are considering moving our FPGA and software images to NOR flash. The FPGA is no problem as it is relatively small but our so...
05/13/2015
- AB 04:03 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Bruce,
Sorry that you are running into this issue.
As shown in our standard MityDSP-L138 architecture page (https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/MityDSP-L138_Architecture) we only usually store the ... - BK 12:33 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Jonathon,
Currently we are not setup to build uBoot and it would take some time to get that up and running. Is there a version of uBoot or any other flash diagnostic tool you could provide to us?
Putting our FPGA and software in NOR...
05/12/2015
- JC 10:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Bruce Kenny wrote:
> Thats interesting, are there any tests we can do using uBoot that may detect an error?
Check out drivers/mtd/nand/davinci_nand.c. The function nand_davinci_correct_data MTDDEBUG messages that can be enabled which ... - BK 09:29 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Jonathon,
Thats interesting, are there any tests we can do using uBoot that may detect an error?
If we do find the flash is faulty what can be done about it?
Is a failed flash unusual, i.e. what is the failure rate?
Thanks fo...
05/11/2015
- JC 09:26 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Bruce,
I am most familiar with the NAND so I see every problem as a potential NAND problem :).
I asked one of the fpga guys here but he hadn't seen an issue like this before.
I believe the NAND still fits the symptoms as it coul... - BK 09:03 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- Jonathon,
Thanks for your reply. We are currently trying to dupicate the problem but the 1 SOM that we have which was exhibiting the problem is now behaving itself! There are some other failed units with the client but we currently do...
05/07/2015
- JC 08:49 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA load fail
- On a unit where the FPGA is failing to load, could you compare the fpga image stored in nand to a fresh copy to see if it could be a nand corruption issue?
If you load the nand image and the fresh image in seperate locations in RAM yo... - We are using the L138-DI-225-RI SOM (OMAP138 with FPGA) and are now finding that some of these SOMs are failing in the field, the symptom is that the on-board FPGA fails to load.
We now have a couple of the failed units back on-site a...
04/30/2015
- MW 07:53 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Bare-metal interrupt handling working only in debugger
- Hi Alex,
Glad you solved your issue, sorry we didn't provide much help. We don't have a lot of folks trying to do Bare-Metal (and we don't do it often either).
-Mike - AL 06:22 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Bare-metal interrupt handling working only in debugger
- No, that was obviously not the reason. The unhosted and hosted linker scripts do link against different libraries but that only seems matters for stdio. I was able to solve the problem by rewritting everything from scratch. The way I was...