Activity

From 11/08/2022 to 12/07/2022

JC 04:40 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Cannot establish an ethernet connection: > changing the ip value from none to dhcp
Don't set dhcp in the kernel bootargs, this will cause boot to fail if it can't get an address and the kernel has no need to get a network connection on boot when you are booting from an sd card... Jonathan Cormier
VK 09:15 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Cannot establish an ethernet connection: The problem has returned. And also, I noticed that the boot process stucks at this moment: Vadym Kolesnyk

JC 06:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Cannot establish an ethernet connection: Glad to hear it Jonathan Cormier
VK 06:03 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Cannot establish an ethernet connection: Suddenly it began to work correctly. I understand nothing;-) I suppose that router was the problem cause. Vadym Kolesnyk
VK 05:18 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Cannot establish an ethernet connection: Hi Jonathan, thank you for your reply!
Previously I have just connected the board to the router. I did not see the board in my LAN, and ifconfig output contained no IP except localhost. Then I tried to override boot command like this: Vadym Kolesnyk
JC 02:26 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Cannot establish an ethernet connection: Hi Vadym, Could you tell me what software and hardware you are using?
Also a console log from boot would be helpful showing the problem your seeing. Jonathan Cormier

VK 10:10 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Cannot establish an ethernet connection: I cannot establish an ethernet connection for ssh and package updating. How to fix it? Vadym Kolesnyk

CH 02:02 PM MitySOM-A10S Altera Arria 10 Software Development: RE: PWM signal generation.: Thank you,
Costas Costas Hatzinikolaou
DV 01:59 PM MitySOM-A10S Altera Arria 10 Software Development: RE: PWM signal generation.: Hi Costas,
Is it acceptable to just have the fan always on at max RPM? If so then a PWM isn't required and you can just plug a fan into J3 and you don't need to worry about PWM logic.
If you do want to control the speed of the fan ... Daniel Vincelette

EA 01:06 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: git clone issues with linux-socfpga.git: Hi Mike,
I tried it in Ubuntu via WSL and yes, it works.
My nonworking windows command window git version is:
git --version
git version 2.38.1.windows.1
I also tried running it via windows powershell and it failed as well.
Ru... Erkan Altan
MW 12:00 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: git clone issues with linux-socfpga.git: Also,
I just tested running the commands listed here with the following version of git. No issues....
What version of git are you using? Michael Williamson
MW 11:58 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: git clone issues with linux-socfpga.git: Hello,
If you are working in windows (windows command shell), you will probably have problems as the linux repository uses logical links, etc. I don't think you can checkout and build linux on a windows NTFS or FAT32/64 filesystem.
... Michael Williamson
EA 11:35 AM MitySOM-5CSX Altera Cyclone V Software Development: git clone issues with linux-socfpga.git: Hi, I have the issue below. After cloning, repo is unusable.
C:\prj\cl>git clone git://support.criticallink.com/home/git/linux-socfpga.git
Cloning into 'linux-socfpga'...
remote: Counting objects: 7107980, done.
remote: Compressin... Erkan Altan

CH 03:27 PM MitySOM-A10S Altera Arria 10 Software Development: PWM signal generation.: We would like to use a cooling fan on the A10 FPGA of the MitySOM-A10S.
We plan to connect the fan to the J3 connector.
How do we generte the PWM signal to control the fan?
And, could you suggest any of the shelf stick on fans to use ... Costas Hatzinikolaou

CH 02:52 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: battery-backup.: Thank you.
Costas Costas Hatzinikolaou
DV 02:49 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: battery-backup.: Hi Costas,
It does not. The MitySOM-A10S doesn't support battery backed up volatile security keys. In order to use the security feature of the Arria 10 you would need to use the one time programmable non-volatile memory for the key st... Daniel Vincelette
CH 01:45 PM MitySOM-A10S Altera Arria 10 FPGA Development: battery-backup.: I understand the the Real Time clock is connected to the VBAT battery voltage input pin of J4 connector in the MitySOM-A10S card.
Does the battery also provide backup for the RAM locations where the volatile security keys are stored?
Costas Hatzinikolaou

CH 10:27 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: Implementing PTP protocol with MitySOM-A10S SOM.: Thanks, Dan.
Costas
From: Daniel Vincelette <redmine@criticallink.s, Dan>
Sent: Tuesday, November 8, 2022 5:17 PM
Subject: [MitySOM-A10S Altera Arria 10 - FPGA Development - msg6242] RE: Implementing PTP protocol with MitySOM-A10... Costas Hatzinikolaou
DV 10:17 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: Implementing PTP protocol with MitySOM-A10S SOM.: Hello Costas,
We have never used PTP on the Arria 10 but the HPS MAC does say that it supports "IEEE 1588-2002 and IEEE 1588-2008 standards for precision networked clock synchronization".
In your device tree you will need to update... Daniel Vincelette

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