Activity
From 06/05/2023 to 07/04/2023
06/27/2023
- 06:13 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Project files and Quartus startup
- Eric,
https://www.intel.com/content/www/us/en/products/details/fpga/development-tools/quartus-prime/resource.html
... - 05:43 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Project files and Quartus startup
- Thanks Mike.
That page filled in a couple of knowledge gaps for me.
I'm still struggling to find out where to g... - 03:41 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Project files and Quartus startup
- Eric,
https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Building_fpga_181
This should be the b... - 05:35 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Pin-muxing SPI
- Eric,
Thanks for sharing! I wasn't sure if it supported arbitrary GPIO pins or not. Good to know!
- Mike - 05:33 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Pin-muxing SPI
- Thanks Mike.
In case it's useful to someone else, I saw that the driver supports the use of "arbitrary GPIO pins":... - 03:36 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Pin-muxing SPI
- Hi Eric,
Your assumptions are correct. To use the hard HPS SPI peripheral, you would use the signals you have high... - 05:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Toolchain bundles
- Thanks Mike
- 03:43 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Toolchain bundles
- Eric,
Use poky-glibc-x86_64-mitysom-image-base-cortexa9hf-neon-toolchain-2.4.4.sh which is under the Quartus 18.1 ...
06/26/2023
- 09:51 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Project files and Quartus startup
- I'm also answering my first question (how to launch Quartus).
The executable name is quartus, and it seems that I ... - 04:01 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Project files and Quartus startup
- I found the answer to the second question on this page:
https://support.criticallink.com/redmine/projects/mityarm-... - I'm just getting started with a MitySOM-5CSX and
First off, this page says "launch quartus", and I'm not sure how... - There are three poky toolchain bundles on this page, and two of them have the same name, "poky-eglibc-x86_64-mitysom-...
06/23/2023
- Hi all,
We'd like to make use of the SPI peripheral on the MitySOM-5CSx with at least two different chip-selects.
... - 08:07 PM MitySOM-AM57X PCB Development: RE: Unconnected pins, board dimensions and hole positions
- Hello.
1. Generally speaking, all of the MFIO pins are direct connects to the AM57xx CPU device and if they are un...
Posting on behalf of customer:
1.The J1 and J3 connectors of MitySOM-AM57 are described as “MFIO” for “Type”.
...
06/14/2023
- 02:46 PM MitySOM-AM57X PCB Development: RE: Design support for USB for use with AM57x SOM
- Datasheet has been released
06/09/2023
- 04:53 PM MitySOM-AM57X PCB Development: RE: Design support for DP83640 Phy IC for use with AM57x SOM
- Hi,
For testing IEEE 1588 H/W time stamp application, we included DP83640 in our circuit. Since DP83640 doesn't ha...
06/07/2023
- 01:47 PM MitySOM-AM57X PCB Development: RE: eMMC support for MitySOM AM572x
Per this e2e post, it should be okay to use 1.8V signal levels with an eMMC.
https://e2e.ti.com/support/processors...- 07:25 AM MitySOM-AM57X PCB Development: RE: eMMC support for MitySOM AM572x
- Hi Jonathan,
We designed an eMMC circuit using *MTFC16GAPALBH-AIT*. As per the data sheet of MitySOM MMC2 signals ...
06/06/2023
- 07:06 PM MitySOM-AM57X PCB Development: RE: Design support for USB for use with AM57x SOM
- The USB2_DM/DP supports 5V voltage level. Datasheet will be updated on next release.
- 02:11 PM MitySOM-AM57X PCB Development: RE: Design support for USB for use with AM57x SOM
- Thanks, I'll look into it. I'm pretty sure that's incorrect.
- 05:49 AM MitySOM-AM57X PCB Development: RE: Design support for USB for use with AM57x SOM
- Hi Jonathan,
*1. For USB2, it is mentioned that voltage level is 1.8V. We need to connect these signals to U... - (Posted by Tom on behalf of customer -- I am working to resolve the locked account issue)
in my work I use your L1...
06/05/2023
- 09:31 PM MitySOM-AM57X PCB Development: RE: Design support for USB for use with AM57x SOM
- Schematic review:
* Both schematics are using VUSB_VBUS1 as a net name. One of them is probably supposed to be VUSB... - Hi,
We need to integrate one USB 3.0, one USB 2.0 and one Debug USB with our application system.
1. For USB2, ... - 06:46 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: VSEL_SD functionality
- No problem. I condensed all this info into a wiki page for future reference as well. And have initiated changes for...
- 06:25 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: VSEL_SD functionality
- Thank you very much to both of you for the quick and extensive answer. The key information that the voltage of VDDSHV...
- 05:51 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: VSEL_SD functionality
- The software side of the SD voltage selection is configured here:
https://support.criticallink.com/gitweb/?p=linux... - 03:02 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: VSEL_SD functionality
- Pal Szabo wrote:
> What is the functionality of the VSEL_SD pin (position 176 on the SODIMM connector)? Is it the sa... - 09:05 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: JTAG TRSTn pulldown and other JTAG pullups
- Thank you very much Mike, this clarifies the implemented pulls!
Also available in: Atom
Go to top
