Mity CPU Platforms

11/29/2023

DV 04:01 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Pin connection

Hi Mohammad,
You could route a clock from the HPS to the fabric, which is done through the HPS block in qsys. This clock is generated from the on SOM 25Mhz oscillator and is PLLed up to 100Mhz by the HPS. The checkbox is called "Enabl... Daniel Vincelette

11/27/2023

JC 02:28 PM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Hint: as long as your changes are only in the device tree file, if you only copy the changed dtb and leave out the zImage, then the kernel version string won't change and you won't have to copy all the kernel modules and copy the extra f... Jonathan Cormier

JC 02:24 PM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Sandeep Sivadas wrote in message#6561:
> Hi,
> ...
You are right that's a little more work than needed. I updated the wiki to simplify the copy commands. The following command should be sufficient to create and copy the files a bit ... Jonathan Cormier

11/23/2023

SS 01:39 PM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Hi,
I tried the kernel and u-boot building as suggested and included the "extra" folder. Now SPI communication, Ethernet,USB etc are working fine. Only one difficulty faced in the Kernel building and copying to /lib/module portion. Ther... Sandeep Sivadas

11/22/2023

JC 06:25 PM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

This doesn't explain why USB isn't coming up though. Your log doesn't show any USB log statements, the most likely reason would be if the USB kernel modules aren't loaded either.
The following modules should have been auto-loaded for... Jonathan Cormier

JC 06:11 PM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Sandeep Sivadas wrote in message#6558:
> Hi,
> ...
Aw okay I didn't know you were using the nonfpga variant, this makes sense. I'll add a note to the wiki.
>
> ...
There are several kernel modules which are built outside of the ke... Jonathan Cormier

SS 05:43 AM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Hi,
I tried the devmem2 commands.The output got as follows
root@mitysom-am57x:/dev# devmem2 0x4A003460
/dev/mem opened.
Memory mapped at address 0xb6f15000.
Read at address 0x4A003460 (0xb6f15460): 0x0004000E
Then i updated ... Sandeep Sivadas

11/21/2023

MA 04:59 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Pin connection

Hello Dan,
Thanks for providing this information and support. According to this datasheet, the FPGA module has an external oscillator. I was wondering if there is any way to enable the internal oscillators to be used because I tried ... Mohammad Hassan Adeli

JC 03:26 PM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Sandeep Sivadas wrote in message#6555:
> Hi Mike,
> ...
If there was no output seen on the CLK or D0 then it is very likely that the pinmux was not updated.
I added a troubleshooting section to the wiki page, to step you through prin... Jonathan Cormier

SS 12:57 PM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Hi Mike,
Output of the spidev_test obtained is
root@mitysom-am57x:~# ./spidev_test -D /dev/spidev4.0 -v
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF F... Sandeep Sivadas

MW 11:22 AM MitySOM-AM57X Software Development: RE: spidev loopback testing not working

Hi Sandeep,
Are you trying to loop spidev4.0 to spidev4.1? Or are you looping back one of the two devices onto themselves (e.g., SPI4_D0 connected to SPI4_D1 on same SPI channel)?
The example you linked to does not perform a loopb... Michael Williamson

SS 06:16 AM MitySOM-AM57X Software Development: spidev loopback testing not working

Hi,
We tried to configure SPI4 in the devkit by following the guidelines in the below link "(https://support.criticallink.com/redmine/projects/mitysom_am57x/wiki/Linux_Application_Using_spidev)".
As per the link we changed mux_data.h... Sandeep Sivadas

11/20/2023

DV 06:30 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Pin connection

Hello Mohammad,
Please take a look at our development board schematic, if you haven't already. It can be found here: https://support.criticallink.com/redmine/projects/5csxbase/wiki/Errata_and_Product_Change_Notifications. *80-000578RC... Daniel Vincelette

11/17/2023

MA 07:38 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Pin connection

Thanks for your reply, Mike. I used Y13 as the clock pin in the development board and I wonder where internally in the layout of the development kit it is connected.
I want to remove just the FPGA module and use it alone in my project... Mohammad Hassan Adeli

MW 07:30 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Pin connection

Hi Mohammad,
If you open up the Datasheet and check Table 8 and search for Y13 you should that it is a direct connect to the EDGE connector (I believe pin 117, but you should double check).
There is no other connection.
With reg... Michael Williamson

MA 07:08 PM MitySOM-5CSX Altera Cyclone V PCB Development: Pin connection

Hello,
I have a development kit of MitySOM-5csx (https://www.criticallink.com/product/mitysom-5csx-dev-kit/). I was wondering can anyone let me know where the Y13 pin of the FPGA module is connected internally in this board.
Thank... Mohammad Hassan Adeli

11/16/2023

AB 06:18 PM MitySOM-5CSX Embedded Vision Developer's Kit for Basler dart BCON Support: RE: Barrel jack type

Marko,
The manufacturer part number used for the barrel jack is PJ-059BH. I have attached the manufacturer datasheet for your reference which has the dimensions you should need.
Alex Alexander Block

MM 07:28 AM MitySOM-5CSX Embedded Vision Developer's Kit for Basler dart BCON Support: Barrel jack type

Hello,
I was wondering if you could help me find information on the specifications for the barrel plug, we need the size of the inner pin and the radius of the barrel. Marko Mamić

MA 03:02 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Clock frequency pins

Hello,
We have this module (https://www.criticallink.com/product/mitysom-5csx/ ) board on our project board and also I have this development kit with the same controller (https://www.criticallink.com/product/mitysom-5csx-dev-kit/).
... Mohammad Hassan Adeli

11/10/2023

JC 06:20 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: Munti-function OMAP pins

Note if you developing a custom baseboard, I'd recommend sending it to support@criticallink.com to have it reviewed.
Also review the https://www.criticallink.com/wp-content/uploads/2014/01/MityDSP-L138-Carrier-Board-Design-Guide.pdf Jonathan Cormier

JC 06:18 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: Munti-function OMAP pins

Any gpio can be used as a spi chip select.
Examples:
https://support.criticallink.com/gitweb/?p=linux-davinci.git;a=blob;f=arch/arm/mach-davinci/baseboard-industrialio.c;h=3e045a6afef77e706dbe3e09ca511cb28b7e526c;hb=refs/heads/mityds... Jonathan Cormier

RS 03:49 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: Munti-function OMAP pins

Hello,
I would like to use the SPI1 on the OMAP with two separate devices are the pin functions in the critical link datasheet table 1 exhaustive?
For instance, could I use pin 61 as SPI1_SCS[5]? The OMAP documentation has it liste... Rachel Shaska

11/09/2023

JC 03:43 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Error building kernel and rootfs on host having Ubuntu 23.04 with docker

Hi Rohini,
I'm not sure why this happens, however especially when all the failed packages are "native" packages and the errors always seem to mention missing files.
I've had good luck cleaning and rebuilding just the failed package... Jonathan Cormier

RG 11:00 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Error building kernel and rootfs on host having Ubuntu 22.04 desktop with docker

Hi Jonathan,
   We are trying to follow steps on Ubuntu 22.04 desktop with following
command and facing some Errors. Kindly find attached build log for details.
*Link:
*https://support.criticallink.com/redmine/projects/mitysom_am... Rohini Gawand

11/06/2023

JC 06:22 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138F Boot issue, I2C0 (PCB Dev Post)

Jon Cox wrote in message#6539:
> Jonathan,
> ...
At this point in the boot, we've already read the eeprom and the pmic is all setup. The i2c0 bus becomes a lot less crucial from the SOMs perspective. I don't think an i2c issue would c... Jonathan Cormier

JC 03:36 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138F Boot issue, I2C0 (PCB Dev Post)

Jonathan,
Thanks for taking a look at the logs.
This is an issue we have been having in parallel to the I2C issues. Good news is the updated kernel does seem to experience much less I2C hanging than previously...now I believe the o... Jon Cox

JC 02:50 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138F Boot issue, I2C0 (PCB Dev Post)

Jon Cox wrote in message#6537:
> Jonathan,
> ...
Hi Jon, Is this still related to the i2c failures you were talking about or is this a different issue?
>
> ...
Unpacking did finish, looks like it got stuck after the kernel was start... Jonathan Cormier

11/03/2023

JC 04:15 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138F Boot issue, I2C0 (PCB Dev Post)

Jonathan,
Apologies on the delay, we've had most of the systems tied up in-use for the past few weeks but I was able to grab some UART captures this morning.
I've attached 4 files - BOOT1-4. BOOT1 did not boot successfully...seems ... Jon Cox