Activity
From 05/02/2026 to 05/31/2026
05/29/2026
- What is the status of streaming from 5 cameras simultaneously? Is this possible with software mods, or are there hardware limitations that prevent this?
05/27/2026
- NO 08:50 PM MitySOM-QC6490 Software Development: RE: Camera driver development
- I removed the power-related fields because my camera is powered by an always-on supply, and I was trying to simplify things as much as possible. I'll try adding that stuff back, in particular @power-domains@ seems like it might be import...
- NZ 08:43 PM MitySOM-QC6490 Software Development: RE: Camera driver development
- Hi Nathan,
I too have noticed the probing of sensors 0-12, I have not looked into it but we see this same behavior. I expect your sensor to be 0.
If your sensor XML has the correct I2C address, I2C speed, sensor ID, and sensor ID r... - NO 01:06 AM MitySOM-QC6490 Software Development: RE: Camera driver development
- Thanks, Noah.
I'm trying to bring up a new sensor, and no luck so far. To simplify things, I've removed all camera modules except mine, and removed all multicamera configs except mine, which has a single camera at cameraId 0, slot 0, ... - MF 03:31 PM MitySOM-A5 Software Development: RE: cl_msgdma.ko has the wrong version
- Hi Samuel,
We plan to integrate this kernel module into our kernel in the near future, so this would be handled automatically for the end user.
However, until then you could explore options such as adding a recipe into the Yocto bu...
05/25/2026
- SP 10:03 PM MitySOM-A5 Software Development: RE: cl_msgdma.ko has the wrong version
- This way works to make a compatible version of cl_msgdma.ko. (/) :D
Is there a way to build it inside the docker container at the same time we build the file system.
https://support.criticallink.com/redmine/projects/mitysom_a5/wiki/... - MF 07:28 PM MitySOM-A5 Software Development: RE: cl_msgdma.ko has the wrong version
- Hi Samuel,
The Wiki instructions say to deploy the compiled kernel and kernel modules to the SD card as well. This way you ensure that all binaries are in sync and the vermagic matches.
You can however try to work around this by ma... - When I try to insert the cl_msgdma kernel module I get the following message.
root@mity-a5e:~# insmod cl_msgdma.ko
[426692.912739] cl_msgdma: version magic '6.12.33-g511c86cb48bf SMP preempt mod_unload aarch64' should be '6.12.33-yo...
05/22/2026
- NZ 03:30 PM MitySOM-QC6490 Software Development: RE: Camera driver development
- Hi Nathan,
It is posted here: https://support.criticallink.com/redmine/projects/mitysom_qc6490/wiki/Camera_Config
Please don't hesitate to reach out if you have further questions!
Thanks,
Noah
05/20/2026
- NZ 09:15 PM MitySOM-QC6490 Software Development: RE: Camera driver development
- Hi Nathan,
We used the r1.0_00095.0 release of Qualcomm_Linux.SPF.1.0|AP|Standard|OEM|NM_QIMPSDK for our firmware development. It contains the r1.0_00376 release of QCM6490.LE.1.0 where the meta-qcom-extras layer resides. These versio...
05/19/2026
- MF 03:43 PM MitySOM-A5 Software Development: RE: make_sd.sh doesn't take command line parameters
- Hi Max,
As mentioned in the "HPS/FPGA Shared Memory thread":https://support.criticallink.com/redmine/boards/75/topics/7293 the data errors you saw were caused by a bug in my xor data generator core. This will be resolved in our next r... - MK 03:32 PM MitySOM-A5 Software Development: RE: make_sd.sh doesn't take command line parameters
- Hello Zach,
We are back to test DMA example design.
Do you have any update regarding the failure that we saw??
Thanks,
Max
05/18/2026
- WE 12:21 PM MitySOM-QC6490 PCB Development: RE: USB3 Data Port with External PD Control
- Good morning David, I hope you had a good weekend!
I'm not super familiar with the kernel framework but I would think that it would get both the "role" the processor needs to be (either host or device) as well as the "orientation" of ...
05/15/2026
- DC 09:28 PM MitySOM-QC6490 PCB Development: RE: USB3 Data Port with External PD Control
- Hello William,
Thanks for your response!
Unfortunately we're locked into having the MUX/PD on the baseboard, so we can't continue down the easy path.
But I've checked and confirmed that the PD controller we are using exposes ... - WE 07:45 PM MitySOM-QC6490 PCB Development: RE: USB3 Data Port with External PD Control
- Hello David,
After thinking about this, here are my thoughts.
The MitySOM-QC natively supports USB 3.0 signal MUXing as well as USB PD. The simplest path, if you're not committed to the external PD/MUX, is to let the SOM handle bo... - Do you have any resources to help with camera driver development? I've found Qualcomm's "Linux Build Guide", "Linux Camera Guide", and "Linux Camera Guide - Addendum". I'm now working on building the camera and sensor files from source.
...
05/14/2026
- GG 08:53 PM MitySOM-QC6490 Software Development: RE: UART bringup
- Hi Nathan,
I am able to reproduce and it seems the issue is not with uart14, but rather with trying to instantiate more than 4 UARTs.
I have not yet found anything in Qualcomm's docs that explains such a limitation.
I will re... - GG 03:13 AM MitySOM-QC6490 Software Development: RE: UART bringup
- Hi Nathan,
Nothing immediately stands out as to why you're having this issue (I have a project where I have success using this QUP for spi14 without issue).
I will try and reproduce your issue on my end and get back to you.
T... - MF 02:44 PM MitySOM-A5 FPGA Development: RE: HPS/FPGA shared external memory
- Hi Max,
Just to make sure we're aligned on the DMA example — what it demonstrates is really the same use case you're after: exchanging data between the FPGA and the ARM through HPS DDR. The example uses the F2H (FPGA-to-HPS) path. The... - MK 01:42 PM MitySOM-A5 FPGA Development: RE: HPS/FPGA shared external memory
- Sorry, forgot to mention, as you suggested, ve tried first DMA example design and we tried to run it. But for now we are interesting in shared memory access, so that's why we are trying FPGA to SDRAM
- MK 01:40 PM MitySOM-A5 FPGA Development: RE: HPS/FPGA shared external memory
- Hello again,
I've created a project based on mitysom-a5e-ref-base project.
We made following modifications:
- we added FPGA to SDRAM Subordinate Bridge into HPS Subsystem
- we added AVMM to AXI4 Bridge (because all of our modules a...
05/13/2026
- Hey Team,
I'm working on porting a hardware design for a custom carrier board to leverage the MitySOM platform. This carrier board owns the USB3 port's CC lines for PD negotiation and cable orientation detection. We don't need Displa...
05/12/2026
- MW 05:09 PM MitySOM-A5 PCB Development: RE: HVIO Speed at 3v3
- Hi Naufal,
The "Agilex-5 datasheet":https://docs.altera.com/r/docs/813918/current/agilextm-5-fpgas-and-socs-device-data-sheet/i/o-pll-specifications specifies the Input clock frequency source from HVIO clock input at a max of 156.25 M... - Hello,
I'm working on an FMC PCB that will interface with the MitySBC-A5E. The board contains an ADV7611 HDMI receiver and an ADV7513 HDMI transmitter, both of which have decoded pixel bus inputs/outputs at 3v3 logic levels. The pixel... - JC 02:29 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Note we did test this briefly on the SDK 11.1 release, and the videocrop wasn't needed. Though I didn't dig into the driver to see what they might have fixed.
05/11/2026
- JP 09:37 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Holden,
No problem; glad to hear things are working now on your end!
-- Jake - HW 04:54 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Hi Jake,
Thank you for looking into all this, it has been extremely helpful!
I looked into how the app actually talks to X11 and found a potential way to keep the app alive while the xserver is stopped so I can utilize kmssink. Pre... - MK 06:20 PM MitySOM-A5 FPGA Development: RE: Signal Tap not working
- Hello Mike, thanks a lot. Yes, not it is working
Max - MF 04:51 PM MitySOM-A5 FPGA Development: RE: Signal Tap not working
- Hi Max,
As shown on the right side of your screenshot, you do not have the correct device selected. You need to select Device: @2 which is the FPGA. @1 device is the ARM.
Let me know if changing that drop box resolves your issue.
... - Hello !!!
We are using mitysom-a5e-ref-base as a reference and we've added FPGA2SDRAM port to HPS and some Avalon Memeory-Mapped generator to initiate some traffic from FPGA to the SDRAM. We also addd Signal Tap to see if the generator ...
05/08/2026
- I've got a device tree building for my carrier board, and a custom QUP configuration working! However, only 4 out of 5 of my UARTs are working. uart14 returns an error when it is probed. Here's the relevant output from dmesg:
05/07/2026
- JP 02:31 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Good morning Holden,
No worries and thanks! I have tried out your X11 image with the pipelines discussed above and things are similar on my end as well. I have tried various pipelines to see what one offers ideal performance and low u...
05/06/2026
- HW 06:19 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Hi Jake,
I apologize I had not seen your previous post (and also brainfarted and thought you were referring to testing on X11 initially) before sending my update. Killing the weston and using the kmssink pipeline you provided, the vid... - JP 05:18 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Holden,
Disregarding X11 & ximagesink for now, can you just initially try our pipeline(s) to see if this is working on your setup?
Also, if you could send the SD card image you are using or tell us how to build it with your X11 mod... - HW 04:18 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- I tried with the pipeline you tested with ximagesink and it still seems pretty laggy. On X11, I get linking failures using videocrop; as far as I have seen it only works when using videoconvert between the decoder and the sink but there...
- JP 04:04 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Good afternoon Holden,
I also have gotten kmssink to work with the following pipeline:
$ gst-launch-1.0 filesrc location=bunny.mp4 ! qtdemux ! h264parse ! v4l2h264dec ! videocrop left=2 ! kmssink
This is very similar to the prev...
05/05/2026
- SP 10:38 PM MitySOM-A5 Software Development: RE: How to make usb to ethernet work ?
- Thanks Mike
Now I have 3 ip devices (including the usb/ethernet on usb-c)
root@mity-a5e:~# ip addr
1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN group default qlen 1000
link/loopback 00:00:00:00:00:00 br... - MF 09:20 PM MitySOM-A5 Software Development: RE: How to make usb to ethernet work ?
- Hi Samuel,
To use a USB-to-Ethernet adapter, the Linux kernel needs to include the appropriate USB networking driver for the adapter chipset.
For the USB Ethernet adapters we have been using, the required kernel option is: - I am working with Maxim on the same machine.
We would like be able to make usb to ethernet adapter work. - MK 09:09 PM MitySOM-A5 FPGA Development: RE: HPS/FPGA shared external memory
- Hello Mike,
Thanks a lot for your answer. I've found the same after I posted the question...
Thanks,
Max - MF 08:55 PM MitySOM-A5 FPGA Development: RE: HPS/FPGA shared external memory
- Hi Max,
Yes, this is possible on the Agilex 5 platform, but the external memory connected to the HPS EMIF is not intended to be modified directly through the hidden emif_io96b_hps.qsys block.
For FPGA logic to exchange data with th... - Dear Sir/Madame,
I would like to create my own design based on mitysom-a5e-ref-base, but with shared between HPS/FPGA external memory. The purpose of this is to exchange data between HPS and FPGA. We would like to try this and see if ... - JP 08:40 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Hello Holden,
I have been looking into your issue with @jcormier, and we are able to get the video to playback at 30fps with around ~40% CPU utilization and no visible signs of frame loss or lag using the following pipeline:
$ gst-... - NO 06:58 PM MitySOM-QC6490 Software Development: RE: Processor rebooting
- Thanks Greg. I'll leave USB1 enabled for now as I work on bringing up other peripherals. I'd love to eventually figure out how to disable it, especially if that can result in any power savings.
- GG 06:34 PM MitySOM-QC6490 Software Development: RE: Processor rebooting
- Hi Nathan,
Thank you for all the information. We have worked with another design that also did not connect the SS lines for this USB and they have not had to make the same changes in the DTS (e.g. having usb_1_qmpphy enabled is not a...
05/04/2026
- HW 11:45 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Hi Jake and Mike,
We do not need Weston/Wayland specifically, but we have a legacy app that heavily depends on X11 which might cause some difficulty using drm/kms. The same issue is present using X11 (using ximagesink instead of wayla... - MW 07:13 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Hi Jake and Holden,
I think the issue may be related to using weston/wayland instead of drm/kms.
The AM62Ax does not have a GPU, so weston/wayland rendering is going to be
CPU bound.
Do you need weston/wayland?
-Mike - JP 07:02 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Playing MP4 to Display Troubles
- Good afternoon Holden,
I am looking into your issue now and have replicated some of your failing behavior. I will update you when I have further info/findings.
Thank you,
Jake - I have been trying to output MP4 video to the display using the hardware encoder/decoder. For the sake of consistency, I am using the 10.01 SDK prebuilt tisdk-default-image and making changes in ti-linux-6.6.y. This image provides the gs...
05/03/2026
- NO 11:24 PM MitySOM-QC6490 Software Development: RE: Processor rebooting
- I've narrowed it down even further. The problem does not occur if I use CriticalLink's QUPConfig and the following device tree: