MityDSP DSP/FPGA pinouts information request
Added by Peter Faill over 12 years ago
I'm starting to implement our own FPGA design on the MityDSP. The pinout mappings between the FPGA and DSP would be very helpful. Actually, the schematic of the whole board would be best but I understand reluctance to release the whole ball of wax. A mapping table or just the part of schematic that reveals the mapping would do the trick.
Thank you,
Peter
Replies (1)
RE: MityDSP DSP/FPGA pinouts information request - Added by Michael Williamson over 12 years ago
Pretty much, all of the connections between the FPGA and internal connections on the module are captured in the c:\mitydsp\2.xx\hardware\fpga_boot\vhdl\MityDSP_top.ucf (or other ucf flavors based on the module, same directory).
The pins connected to the DSP are primarily the EMIF bus lines, NMI, reset, and the ext interrupt pins [4..7] and should be fairly intuitive to decipher from the UCF (I think they match the DSP specification for the pin names). In addition, there is also a 25 MHz clock input (same one that is fed to the DSP).
The remaining connections to the edge connector can by captured by using the spec sheet or the CAD symbol for the module.
Is there some specific detail that you require? If you contact Tom Catalino, he may be willing to share the schematic with you under some form of NDA.
Just remember that you should pull-up unused IOBs for MityDSP-6711 based designs.
-Mike
