Activity
From 01/06/2013 to 02/04/2013
02/04/2013
- 08:12 AM FPGA Development: RE: About CE4 CE5 and INT6's pin asisgnment in FPGA
- Hello.
CE4 is connected to W15 of the FPGA (Bank 4).
CE5 is connected to AA15 of the FPGA (Bank 4).
GP [6] is co... - Hi,
I want to design a sync fifo in the FPGA, which will use a synchronous interface in EMIF. So it is better
t...
01/09/2013
- 10:27 AM Software Development: RE: Where can I get user's manual and MDK files for Mitydsp-pro
- Go to the Files tab on this project site and download and install the MityDSP_2_11_0.exe application.
This is a wi... - I bought 3 Mitydsp-pro moudles. When these moudles were shipped to me, no CDs or other kind of manuals are included....
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