Mity CPU Platforms » MitySOM-A5

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12:36 AM PCB Development: RE: PCIe connection to Computer MB

Hi,
Actually, there is another issue, in EP mode, the Presecence signals, PRSNT2_*X1*# and PRSNT2_*X4*# need to ... Keith Murison

08/28/2025

08:58 PM FPGA Development: RE: Fail to program device

Did you make changes to the design to switch to FPGA first as described in my previous post? Or are you just trying t... Mike Fiorenza

08:28 PM FPGA Development: RE: Fail to program device

Hello Mike,
Thanks again for your help!!!
I've followed the instructions that you send me yesterday. The command ... Maxim Kanevsky

04:36 PM FPGA Development: RE: Fail to program device

> But, since we are using FPGA ONLY (no HPS), should this instructions to be applied, or we can generate .jic only??
... Mike Fiorenza

02:16 PM FPGA Development: RE: Fail to program device

Hello Mike,
I'm going to follow the instructions.
But, since we are using FPGA ONLY (no HPS), should this instruc... Maxim Kanevsky

08:13 PM FPGA Development: RE: What is the recommended version of Quartus for MitySOM_A5?

Hello Maxim,
We will coordinate this with Engineering Management and get back to you mid-next week. Since I know y... Thomas Catalino

02:06 PM FPGA Development: RE: What is the recommended version of Quartus for MitySOM_A5?

Hello Mike,
Thanks for your help. I've got the attached reference.
I have a question: do you have any estimation fo... Maxim Kanevsky

01:42 PM FPGA Development: RE: What is the recommended version of Quartus for MitySOM_A5?

Maxim,
Attached is our reference design for 25.1. This is not formally released yet as we are still working on wra... Mike Fiorenza

03:23 PM PCB Development: RE: PCIe connection to Computer MB

Hello,
Samtec does offer Cross-Over type of cable in their Gen 4 and Gen 5 cables.
https://www.samtec.com/pro... Keith Murison

09:45 AM PCB Development: RE: PCIe connection to Computer MB

Hi Keith,
Your concern is valid. You will need some sort of "cross-over" cable to swap Tx/Rx lines, etc.
I am ... Michael Williamson

08/27/2025

09:18 PM FPGA Development: RE: Fail to program device

Maxim,
Please use the instructions found here for programming the QSPI NOR Flash (from the command line): https://... Mike Fiorenza

09:07 PM FPGA Development: Fail to program device

Hello
I've just got MitySOM_A5 Dev. Kit and started to work on it.
I'm trying to create my own project based on Cri... Maxim Kanevsky

09:12 PM FPGA Development: What is the recommended version of Quartus for MitySOM_A5?

Hello,
I'm trying to create an example design for AXI MCDMA for PCIe. But this IP core is exist in Q25.x versions on... Maxim Kanevsky

08:51 PM PCB Development: RE: PCIe connection to Computer MB

however I think the Tx and Rx lines need to be swapped w.r.t. the connector between EP and RP ... we cannot change th... Keith Murison

08:20 PM PCB Development: RE: PCIe connection to Computer MB

okay I see there are some 0 ohm resistors to feedback the REFCLK+/- (PCIe_CLK) in end point mode... R81 and R83 on ca... Keith Murison

08:09 PM PCB Development: PCIe connection to Computer MB

Hello,
We are working on testing the PCIe interface on the Mighty-Mini Agilex-5E dev kit.
The PCIe x4 connector... Keith Murison

08:28 PM PCB Development: RE: FAN enable

Keith,
The FAN_EN GPIO can be enabled by exporting the GPIO in sysfs and driving it high.... Mike Fiorenza

07:52 PM PCB Development: FAN enable

Hello,
Is there a Linux software command to enable the +5V Fan from the HPS ? or a register we can write to to ... Keith Murison